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Intel® Parallel Computing Center at Hartree Centre, STFC

Intel® PCC at the Hartree Centre is to enable UK academic and industrial codes to exploit the parallel and energy.
Authored by admin Last updated on 03/09/2019 - 12:20
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Accelerating Financial Applications on Intel® architecture

Learn more about an in-depth analysis of code modernization performance conducted by optimizing original CPU code and re-running tests on the latest GPU/CPU hardware.
Authored by George Raskulinec (Intel) Last updated on 07/06/2019 - 16:40
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Parallel Programming Books

Use these parallel programming resources and books with your Intel® Xeon® processor and Intel® Xeon Phi™ processor family
Authored by Mike P. (Intel) Last updated on 03/21/2019 - 12:00
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Intel® Parallel Computing Center at Princeton University, Princeton Neuroscience Institute and Computer Science Dept.

Intel® Xeon Phi™ coprocessors, based on Many-Integrated-Core (MIC) architecture, offer an alternative to GPUs for deep learning, because its peak floating-point performance and cost are on par with a GPU, while offering several advantages such as easy to program, binary compatible with host processor, and direct access to large host memory. However, it is still challenging to fully take...
Authored by admin Last updated on 03/29/2019 - 12:28
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Intel® Parallel Computing Center at Indiana University

The Indiana University Intel® Parallel Processing Center (Intel® PCC) is a multi-component interdisciplinary center. The initial activities involve Center Director Judy Qiu, an Assistant Professor in the School of Informatics and Computing, and Distinguished Professor of Physics Steven Gottlieb. Qiu will be researching novel parallel systems supporting data analytics and Gottlieb will be adapting...
Authored by admin Last updated on 03/29/2019 - 12:28
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基于英特尔® 架构加速金融应用

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Authored by George Raskulinec (Intel) Last updated on 07/06/2019 - 16:40
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Books - Message Passing Interface (MPI)

This article looks at several books that introduce developers to the topics of Message Passing Interface (MPI), parallel programming, and OpenMP*.
Authored by Mike P. (Intel) Last updated on 12/12/2018 - 18:00
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Caffe* Training on Multi-node Distributed-memory Systems Based on Intel® Xeon® Processor E5 Family

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:54
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基于英特尔® 至强™ 处理器 E5 产品家族的多节点分布式内存系统上的 Caffe* 培训

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:55