Article

Caffe* Training on Multi-node Distributed-memory Systems Based on Intel® Xeon® Processor E5 Family

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:54
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IDF'15 Webcast: Data Analytics and Machine Learning

This Technology Insight will demonstrate how to optimize data analytics and machine learning workloads for Intel® Architecture based data center platforms. Speaker: Pradeep Dubey Intel Fellow, Intel Labs Director, Parallel Computing Lab, Intel Corporation
Authored by Mike P. (Intel) Last updated on 07/06/2019 - 16:40
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IDF15 - Webcast: Code Modernization Best Practices

Intel® Xeon® and Intel® Xeon Phi™ processor based platforms provide multiple levels of parallel execution resources. The amount of compute power of these resources is growing with every product generation, yet most applications do not fully utilize the available computing resources. This session will provide details on the growth in hardware resources and characterize performance using different...
Authored by Last updated on 07/06/2019 - 11:37
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Evaluating the Power Efficiency and Performance of Multi-core Platforms Using HEP Workloads

As Moore’s Law drives the silicon industry towards higher transistor counts, processor designs are becoming more and more complex. The area of development includes core count, execution ports, vector units, uncore architecture and finally instruction sets. This increasing complexity leads us to a place where access to the shared memory is the major limiting factor, resulting in feeding the cores...
Authored by Mike P. (Intel) Last updated on 07/12/2019 - 15:31
Article

Single-Root Input/Output Virtualization (SR-IOV) with Linux* Containers

This paper is a result of a joint CERN openlab-Intel research activity with the aim to investigate whether Linux Containers can be used together with SR-IOV in conjunction and complementary to the existing virtualization infrastructure in the CERN Data Centre. This solution could be potentially applied to the storage nodes, which are principally used for Input/Output operations, while keeping the...
Authored by Marco Righini (Intel) Last updated on 07/05/2019 - 11:00
Article

基于英特尔® 至强™ 处理器 E5 产品家族的多节点分布式内存系统上的 Caffe* 培训

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:55
Article

采用 Linux* Containers 的单根输入/输出虚拟化 (SR-IOV)

This paper is a result of a joint CERN openlab-Intel research activity with the aim to investigate whether Linux Containers can be used together with SR-IOV in conjunction and complementary to the existing virtualization infrastructure in the CERN Data Centre. This solution could be potentially applied to the storage nodes, which are principally used for Input/Output operations, while keeping the...
Authored by Marco Righini (Intel) Last updated on 07/05/2019 - 11:02
Article

评估使用 HEP 工作负载的多核平台的能效和性能

As Moore’s Law drives the silicon industry towards higher transistor counts, processor designs are becoming more and more complex. The area of development includes core count, execution ports, vector units, uncore architecture and finally instruction sets. This increasing complexity leads us to a place where access to the shared memory is the major limiting factor, resulting in feeding the cores...
Authored by Mike P. (Intel) Last updated on 07/06/2019 - 16:40
Article

Option "-z defs" is no longer needed to detect missing symbols in code targeting Intel MIC Architecture at link time

Prior to Intel® Compiler 15.0 in the offload compilation model, the binaries targeting the Intel MIC Architecture were generated as dynamic libraries (.so).

Authored by Duan, Xiaoping (Intel) Last updated on 07/06/2019 - 16:40
Article

Виртуализация SR-IOV и контейнеры Linux*

 

Authored by Last updated on 07/05/2019 - 11:01