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Disclosure of Hardware Prefetcher Control on Some Intel® Processors

This article discloses the MSR setting that can be used to control the various hardware prefetchers that are available on Intel processors based on the following microarchitectures: Nehalem,

Authored by Vish Viswanathan (Intel) Last updated on 07/05/2019 - 20:34
Article

部分英特尔处理器硬件预取器的发布

部分英特尔处理器硬件预取器的发布

本文发布的 MST 设置可用来控制基于以下微架构的英特尔处理器上可用的各种硬件预取器: Nehalem、Westmere、Sandy Bridge、Ivy Bridge、Haswell 和 Broadwell。

Authored by Vish Viswanathan (Intel) Last updated on 07/05/2019 - 20:35
Article

Option "-z defs" is no longer needed to detect missing symbols in code targeting Intel MIC Architecture at link time

Prior to Intel® Compiler 15.0 in the offload compilation model, the binaries targeting the Intel MIC Architecture were generated as dynamic libraries (.so).

Authored by Duan, Xiaoping (Intel) Last updated on 07/06/2019 - 16:40
Article

Hardware and Software Approach for Using NUMA Systems

Learn how to build an application that runs effectively on non-uniform memory access (NUMA) hardware. This article walks you through choosing the algorithm all the way through to measuring your application's performance.
Authored by Last updated on 03/21/2019 - 12:00
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How AisaInfo ADB* Improves Performance with Intel® Xeon® Processor-Based Systems

This article describes how AsiaInfo ADB was able to take advantage of features like Intel® Advanced Vector Extensions 2 and Intel® Transactional Synchronization Extensions as well as faster Intel® Solid State Drive hard disks to improve its performance when running on systems equipped with the latest generation of Intel® Xeon® processors.
Authored by Nguyen, Khang T (Intel) Last updated on 07/06/2019 - 16:40
Article

Thread Parallelism in Cython*

Cython* is a superset of Python* that additionally supports C functions and C types on variable and class attributes. Cython generates C extension modules, which can be used by the main Python program using the import statement.
Authored by Nguyen, Loc Q (Intel) Last updated on 07/06/2019 - 16:30
Article

Intel Solutions and Technologies for the Evolving Data Center

  One Stop for Optimizing Your Data Center From AI to Big Data to HPC: End-to-end Solutions
Authored by admin Last updated on 07/06/2019 - 16:40
Article

Vector API Developer Program for Java* Software

This article introduces Vector API to Java* developers. It shows how to start using the API in Java programs, and provides examples of vector algorithms. It provides step-by-step details on how to build the Vector API and build Java applications using it. It provides the location for downloadable binaries for Project Panama binaries.
Authored by Neil V. (Intel) Last updated on 07/06/2019 - 16:30
Article

Intel® Accelerates Hardware and Software Performance for Server-Side Java* Applications

Intel® contributes significantly to both software and hardware optimizations for Java*.

Authored by Mike P. (Intel) Last updated on 07/06/2019 - 16:30
Article

Accelerating x265 with Intel® Advanced Vector Extensions 512 (Intel® AVX-512)

Vector units in CPUs have become the de facto standard for acceleration of media, and other kernels that exhibit parallelism according to the single instruction, multiple data (SIMD) paradigm. SIMD on Intel® architecture processors have evolved to enable 512-bit register files in Intel® Advanced Vector Extensions 512 (Intel® AVX-512).
Authored by Last updated on 07/06/2019 - 16:58