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Second Generation Intel® Xeon® Processor Scalable Family Technical Overview

New features and enhancements available in the second generation Intel® Xeon® processor Scalable family and how developers can take advantage of them
Authored by David Mulnix (Intel) Last updated on 09/30/2019 - 17:28
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Using Intel® MPI Library on Intel® Xeon Phi™ Product Family

This document is designed to help users get started writing code and running MPI applications using the Intel® MPI Library on a development platform that includes the Intel® Xeon Phi™ processor.
Authored by Nguyen, Loc Q (Intel) Last updated on 10/15/2019 - 15:04
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Caffe* Optimized for Intel® Architecture: Applying Modern Code Techniques

This paper demonstrates a special version of Caffe* — a deep learning framework originally developed by the Berkeley Vision and Learning Center (BVLC) — that is optimized for Intel® architecture.
Authored by Last updated on 10/15/2019 - 15:30
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Vector API Developer Program for Java* Software

This article introduces Vector API to Java* developers. It shows how to start using the API in Java programs, and provides examples of vector algorithms. It provides step-by-step details on how to build the Vector API and build Java applications using it. It provides the location for downloadable binaries for Project Panama binaries.
Authored by Neil V. (Intel) Last updated on 10/15/2019 - 15:30
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Migrating Applications from Knights Corner to Knights Landing Self-Boot Platforms

While there are many different programming models for the Intel® Xeon Phi™ coprocessor (code-named Knights Corner (KNC)), this paper lists the more prevalent KNC programming models and further discusses some of the necessary changes to port and optimize KNC models for the Intel® Xeon Phi™ processor x200 self-boot platform.
Authored by Michael Greenfield (Intel) Last updated on 10/15/2019 - 16:40
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Intel® Accelerates Hardware and Software Performance for Server-Side Java* Applications

Intel® contributes significantly to both software and hardware optimizations for Java*.

Authored by Mike P. (Intel) Last updated on 10/15/2019 - 16:40
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应用蚁群优化算法 (ACO) 实施交通网络扩展

In this article an OpenMP* based implementation of the Ant Colony Optimization algorithm was analyzed for bottlenecks with Intel® VTune™ Amplifier XE 2016 together with improvements using hybrid MPI-OpenMP and Intel® Threading Building Blocks were introduced to achieve efficient scaling across a four-socket Intel® Xeon® processor E7-8890 v4 processor-based system.
Authored by Sunny G. (Intel) Last updated on 10/15/2019 - 16:40
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Scale-Up Implementation of a Transportation Network Using Ant Colony Optimization (ACO)

In this article an OpenMP* based implementation of the Ant Colony Optimization algorithm was analyzed for bottlenecks with Intel® VTune™ Amplifier XE 2016 together with improvements using hybrid MPI-OpenMP and Intel® Threading Building Blocks were introduced to achieve efficient scaling across a four-socket Intel® Xeon® processor E7-8890 v4 processor-based system.
Authored by Sunny G. (Intel) Last updated on 10/15/2019 - 16:40
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Authored by David Mulnix (Intel) Last updated on 10/15/2019 - 16:40