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Hello,

I am running a source code using the Intel® Parallel Studio XE Composer Edition for Fortran with Rogue Wave IMSL 7.0 for Windows*

Authored by Divya K. Last updated on 08/30/2016 - 06:21
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Predicting user activity in devices using an accelerometer with the Intel® Edison Board

This project describes how to recognize certain types of human physical activities using acceleration data generated from the ADXL345 accelerometer connected to the Intel® Edison board.
Authored by Roy Allela. (Intel) Last updated on 08/30/2016 - 04:28
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Customized OneSignal notification sound for app builded in Cordova Intel XDK?

I am using OneSignal to add push notifications to my hybrid app. Now that the notifications are working, I want to replace the default device's sound by my own Sound1.wav as mentioned here: 

Authored by Frungh B. Last updated on 08/30/2016 - 02:40
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Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Models Part 4

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Mike P. (Intel) Last updated on 08/30/2016 - 02:09
Video

Beginning Intel Xeon Phi Coprocessor Workshop: Programming Modeling Part 3

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Jerry Makare (Intel) Last updated on 08/30/2016 - 02:09
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Models Part 2

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Mike P. (Intel) Last updated on 08/30/2016 - 02:09
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Performance Analysis

This module briefly discusses a performance analysis methodology, collecting HW performance data  and using Intel® VTune Applifier XE to view and interpret the performance data.

Authored by Mike P. (Intel) Last updated on 08/30/2016 - 02:09
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Modeling Part 1

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Mike P. (Intel) Last updated on 08/30/2016 - 02:09
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Optimization Part 2

This module looks at basic optimization techniques for the Intel Xeon Phi coprocessor.

Authored by Mike P. (Intel) Last updated on 08/30/2016 - 02:09
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Optimization Part 1

This module looks at basic optimization techniques for the Intel Xeon Phi coprocessor.

Authored by Mike P. (Intel) Last updated on 08/30/2016 - 02:09
For more complete information about compiler optimizations, see our Optimization Notice.