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Parallel Universe Magazine #12: Advanced Vectorization

This blog contains additional content for the article "Advanced Vectorization" from Parallel Universe #12:

Authored by Last updated on 07/03/2019 - 20:08
Blog post

Introduction to OpenMP* on YouTube*

Tim Mattson (Intel) has authored an extensive series of excellent videos as in introduction to OpenMP*.

Authored by Mike P. (Intel) Last updated on 07/04/2019 - 19:51
Blog post

Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
Authored by Roman Dementiev (Intel) Last updated on 07/04/2019 - 17:00
Article

Improve Vectorization Performance with Intel® AVX-512

See how the new Intel® Advanced Vector Extensions 512CD and the Intel AVX512F subsets (available in the Intel® Xeon Phi processor and in future Intel Xeon processors) lets the compiler automatically generate vector code with no changes to the code.
Authored by Alberto V. (Intel) Last updated on 07/08/2019 - 19:26
Article

BigDL – Scale-out Deep Learning on Apache Spark* Cluster

Learn how to install and use BigDL for training and testing some of the commonly used deep neural network models on Apache Spark.
Authored by Sunny G. (Intel) Last updated on 03/11/2019 - 13:17
Article
Article

Training an Agent to Play Pong* Using neon™ Framework

This article showcases the implementation of an agent to play the game Pong* using an Intel® architecture-optimized neon™ framework, and to serve as an introduction to the Policy Gradients algorithm.
Authored by Kaustav Tamuly Last updated on 06/18/2018 - 16:10
Article

Intel® Power Governor

Martin Dimitrov, Carl Strickland, Karthik Kumar, Seung-Woo Kim, Kshitij Doshi A utility and library for monitoring and controlling energy consumption.
Authored by Martin Dimitrov (Intel) Last updated on 08/20/2019 - 14:08
Article

Monte-Carlo simulation on Asian Options Pricing

This is an exercise in performance optimization on heterogeneous Intel architecture systems based on multi-core processors and manycore (MIC) coprocessors.
Authored by Mike P. (Intel) Last updated on 09/30/2019 - 17:28
Article

Direct N-body Simulation

Exercise in performance optimization on Intel Architecture, including Intel® Xeon Phi™ processors.
Authored by Mike P. (Intel) Last updated on 09/30/2019 - 17:28