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Parallel Universe Magazine #12: Advanced Vectorization

This blog contains additional content for the article "Advanced Vectorization" from Parallel Universe #12:

Authored by Last updated on 07/03/2019 - 20:08
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Applying Intel® Threading Building Blocks Observers for Thread Affinity on Intel® Xeon Phi™ Coprocessors

In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library [1] [2] provides high-level task based parallelism intended to hide sof

Authored by Alex (Intel) Last updated on 08/01/2019 - 09:30
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Introduction to OpenMP* on YouTube*

Tim Mattson (Intel) has authored an extensive series of excellent videos as in introduction to OpenMP*.

Authored by Mike P. (Intel) Last updated on 07/04/2019 - 19:51
Article

Caffe* Training on Multi-node Distributed-memory Systems Based on Intel® Xeon® Processor E5 Family

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:54
Article

Caffe* Scoring Optimization for Intel® Xeon® Processor E5 Series

    In continued efforts to optimize Deep Learning workloads on Intel® architecture, our engineers explore various paths leading to the maximum performance.

Authored by Gennady F. (Blackbelt) Last updated on 03/21/2019 - 12:28
Article

A Runtime Generated FFT for Intel® Processor Graphics

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Authored by Dan Petre (Intel) Last updated on 07/06/2019 - 20:30
Article

SPIR-V is a better SPIR with Intel® OpenCL™ Code Builder

Download the pdf version of the article

Authored by Robert I. (Intel) Last updated on 07/08/2019 - 14:19
Blog post

Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
Authored by Roman Dementiev (Intel) Last updated on 07/04/2019 - 17:00
Article

Improve Vectorization Performance with Intel® AVX-512

See how the new Intel® Advanced Vector Extensions 512CD and the Intel AVX512F subsets (available in the Intel® Xeon Phi processor and in future Intel Xeon processors) lets the compiler automatically generate vector code with no changes to the code.
Authored by Alberto V. (Intel) Last updated on 07/08/2019 - 19:26