Blog post

Introduction to OpenMP* on YouTube*

Tim Mattson (Intel) has authored an extensive series of excellent videos as in introduction to OpenMP*.

Authored by Mike P. (Intel) Last updated on 07/04/2019 - 19:51
Article

Demo: Advantage of Westmere Crypto Acceleration Engine

Purpose of this demo is to show an advantage of Westmere Crypto Acceleration Engine.
Authored by Last updated on 02/04/2019 - 15:08
Article

Code Sample: Optimizing Binarized Neural Networks on Intel® Xeon® Scalable Processors

In the previous article, we discussed the performance and accuracy of Binarized Neural Networks (BNN). We also introduced a BNN coded from scratch in the Wolfram Language. The key component of this neural network is Matrix Multiplication.
Authored by Yash Akhauri Last updated on 03/21/2019 - 12:40
Article

Thread Parallelism in Cython*

Cython* is a superset of Python* that additionally supports C functions and C types on variable and class attributes. Cython generates C extension modules, which can be used by the main Python program using the import statement.
Authored by Nguyen, Loc Q (Intel) Last updated on 07/06/2019 - 16:30
Blog post

Applying Intel® Threading Building Blocks Observers for Thread Affinity on Intel® Xeon Phi™ Coprocessors

In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library [1] [2] provides high-level task based parallelism intended to hide sof

Authored by Alex (Intel) Last updated on 08/01/2019 - 09:30
Article

Performance of Classic Matrix Multiplication Algorithm on Intel® Xeon Phi™ Processor System

Matrix multiplication (MM) of two matrices is one of the most fundamental operations in linear algebra. The algorithm for MM is very simple, it could be easily implemented in any programming language. This paper shows that performance significantly improves when different optimization techniques are applied.
Authored by Last updated on 06/14/2019 - 11:50
Article

Intel® Xeon Phi™ Processor 7200 Family Memory Management Optimizations

This paper examines software performance optimization for an implementation of a non-library version of DGEMM executing on the Intel® Xeon Phi™ processor (code-named Knights Landing, with acronym K

Authored by Last updated on 07/06/2019 - 16:30
Article

Caffe* Scoring Optimization for Intel® Xeon® Processor E5 Series

    In continued efforts to optimize Deep Learning workloads on Intel® architecture, our engineers explore various paths leading to the maximum performance.

Authored by Gennady F. (Blackbelt) Last updated on 03/21/2019 - 12:28
Article

Direct N-body Simulation

Exercise in performance optimization on Intel Architecture, including Intel® Xeon Phi™ processors.
Authored by Mike P. (Intel) Last updated on 03/21/2019 - 12:00
Article

Using Intel® MPI Library on Intel® Xeon Phi™ Product Family

This document is designed to help users get started writing code and running MPI applications using the Intel® MPI Library on a development platform that includes the Intel® Xeon Phi™ processor.
Authored by Nguyen, Loc Q (Intel) Last updated on 03/21/2019 - 12:00