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Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Authored by Roman Dementiev (Intel) Last updated on 07/06/2019 - 17:00
Article

Fortran vs. C Offload Directives and Functions

This is a "cheatsheet" comparing the Fortran and C++ offload directives and functions in the context of programming for the Intel® Xeon Phi™ coprocessor

Authored by Belinda Liviero (Intel) Last updated on 07/08/2019 - 15:02
Article

Many Faces of Parallelism

Many Faces of Parallelism: Porting Programs to the Intel® Many Integrated Core Architecture

Authored by admin Last updated on 03/21/2019 - 12:00
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Applying Intel® Threading Building Blocks Observers for Thread Affinity on Intel® Xeon Phi™ Coprocessors

In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library [1] [2] provides high-level task based parallelism intended to hide sof

Authored by Alex (Intel) Last updated on 08/01/2019 - 09:30
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Using Basic Capabilities of Multi-Device Systems with OpenCL™

Download for Windows*

Authored by Last updated on 05/31/2019 - 14:10
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High Performance DEFLATE Compression with Optimizations for Genomic Data Sets

Abstract
Authored by admin Last updated on 07/06/2019 - 16:40
Article

Eight Optimizations for 3-Dimensional Finite Difference (3DFD) Code with an Isotropic (ISO)

This article describes how to implement and optimize a three-dimension isotropic kernel with finite differences to run on the Intel® Xeon® Processor and Intel® Xeon Phi™.
Authored by Cédric ANDREOLLI (Intel) Last updated on 07/06/2019 - 16:40
Article

Caffe* Training on Multi-node Distributed-memory Systems Based on Intel® Xeon® Processor E5 Family

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
Authored by Gennady F. (Blackbelt) Last updated on 07/05/2019 - 14:54
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Caffe* Scoring Optimization for Intel® Xeon® Processor E5 Series

    In continued efforts to optimize Deep Learning workloads on Intel® architecture, our engineers explore various paths leading to the maximum performance.

Authored by Gennady F. (Blackbelt) Last updated on 03/21/2019 - 12:28