Article

Code Sample: Optimizing Binarized Neural Networks on Intel® Xeon® Scalable Processors

In the previous article, we discussed the performance and accuracy of Binarized Neural Networks (BNN). We also introduced a BNN coded from scratch in the Wolfram Language. The key component of this neural network is Matrix Multiplication.
Authored by Yash Akhauri Last updated on 03/21/2019 - 12:40
Article

3D Finite Differences on Multi-core Processors

Abstract
Authored by Leonardo B. (Intel) Last updated on 06/14/2017 - 13:09
Article

Intel® Parallel Studio XE 2015 Composer Edition on Linux*

Authored by admin Last updated on 12/31/2018 - 15:00
Article

Thread Parallelism in Cython*

Cython* is a superset of Python* that additionally supports C functions and C types on variable and class attributes. Cython generates C extension modules, which can be used by the main Python program using the import statement.
Authored by Nguyen, Loc Q (Intel) Last updated on 07/06/2019 - 16:30
Article

Improve Application Performance on an Intel® Xeon Phi™ Processor

Learn techniques for vectorizing code, adding thread-level parallelism, and enabling memory optimization.
Authored by Nguyen, Loc Q (Intel) Last updated on 06/14/2019 - 11:50
Article

Using Modern C++ Techniques to Enhance Multi-core Optimizations

With multi-core processors now common place in PCs, and core counts continually climbing, software developers must adapt. By learning to tackle potential performance bottlenecks and issues with concurrency, engineers can future-proof their code to seamlessly handle additional cores as they are added to consumer systems.
Authored by Last updated on 07/06/2018 - 11:30
Documentation

Finance: Black-Scholes from Intel® C++ Compiler Code Samples

The Black-Scholes Equation estimates the price of a European option over time.

Last updated on 03/21/2019 - 09:08
Article

Recipe: Building and Running GROMACS* on Intel® Processors

This recipe describes how to get, build, and run the GROMACS* code on Intel® Xeon® and Intel® Xeon Phi™ processors for better performance on a single node.
Authored by Smahane Douyeb. (Intel) Last updated on 03/21/2019 - 12:08
Blog post

Applying Intel® Threading Building Blocks Observers for Thread Affinity on Intel® Xeon Phi™ Coprocessors

In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library [1] [2] provides high-level task based parallelism intended to hide sof

Authored by Alex (Intel) Last updated on 07/06/2019 - 17:00
Documentation

Explicit Vector Programming from Intel® C++ Compiler Code Samples

Auto-vectorization has its limitations.

Last updated on 03/21/2019 - 09:08