Event

Correct To Correct & Efficient: A Case Study With Hydro2D

Upon completion of this webinar, you will be familiar with how a given physical process be simulated on a computer efficiently.
Authored by admin Last updated on 09/01/2016 - 09:53
Event

From "Correct" to "Correct and Efficient": A Case Study with miniMD

Upon completion of this webinar, you will be familiar with how a given physical process be simulated on a computer efficiently.
Authored by admin Last updated on 09/01/2016 - 09:53
Event

Exploiting multi-level Parallelism in HPC applications

Upon completion of this webinar, you will be familiar with advanced threading methods for the Intel® Xeon Phi™ coprocessor such as various approaches to nested parallelism within the part.
Authored by admin Last updated on 03/21/2019 - 15:50
Event

Think Parallel Modern - Applications for Modern Hardware

Upon completion of this webinar you will become familiar with modern Intel parallel architectures and Intel® Xeon Phi™ architecture for both hardware and software.
Authored by admin Last updated on 09/01/2016 - 09:53
Event

Compiler, Architecture and Tools Conference (CATC) 2015

This conference will focus on these exciting new directions and how they are influencing the architecture and compilation domain.
Authored by admin Last updated on 07/10/2018 - 08:00
Event

Effective Parallel Optimizations with Intel® Fortran

SIMD and multi-core processor features can boost app performance―but only if the app is optimized for parallel execution. Intel® Fortran can help.
Authored by admin Last updated on 07/06/2016 - 23:18
Event

Intel® Threading Building Blocks Meet Heterogeneous Computing

Computing platforms are becoming increasingly heterogeneous. Intel® Threading Building Blocks can help you harness the spectrum of compute resources.
Authored by admin Last updated on 12/06/2018 - 14:38
Event

Have a Heart: Love your Hybrid Programs

Hybrid program underperforming? Give it a jolt with performance analysis tools like Intel® VTune™ Amplifier and Intel® Trace Analyzer and Collector.
Authored by admin Last updated on 03/18/2016 - 12:01
Event

OpenMP: Beyond Shared Memory Parallel Programming

OpenMP* is the standard for parallel programming on shared memory systems. See how it supports modern CPUs.
Authored by admin Last updated on 04/27/2016 - 13:14
Event

Effective Vectorization with Intel® SDLT

Learn Intel® SIMD Data Layout Templates (Intel® SDLT) improve performance by specifying preferred SIMD data layout without restructuring your code.
Authored by admin Last updated on 04/28/2016 - 18:30