Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor
The Scalable Heterogeneous Computing Benchmark Suite (SHOC https://github.com/vetter/shoc-mic#readme
If you remember from my first post I presented a program.
The code used in examples (Chapters 2-4) in our book Intel® Xeon Phi™ Coprocessor High Performance Programming can be downloaded from the
Applying Intel® Threading Building Blocks observers for thread affinity on Intel® Xeon Phi™ coprocessors.
In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library   provides high-level task based pa
Tim Mattson (Intel), has authored an extensive series of excellent videos as in introduction to OpenMP*.