How to configure OpenMP in the Intel IPP library to maximize multi-threaded performance of the Intel IPP primitives.
Applications often use files to store data from one run to the next, but high-capacity, non-volatile memory devices make it possible to store data more effectively than using a disk-based file system. This article describes how to design your application to take advantage of these memory devices, thereby avoiding the need for files to serve as persistent memory.
If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
Read about Visual Bag-of-Words in Python*, understand the new compiler feature Array Shape Check, and be a beta tester for Intel® Parallel Studio XE.
Intel’s non-uniform memory access (NUMA) strategy is based on several new memory technologies that promise significant improvements in both capability and performance. This article provides information on Multi-Channel DRAM (MCDRAM) and High-Bandwidth Memory (HBM), Non-volatile dual inline-memory modules (NVDIMMs), and Intel® Omni-Path Fabric (Intel® OP Fabric).
New features and enhancements available in the second generation Intel® Xeon® processor Scalable family and how developers can take advantage of them
Modern Memory Subsystems Benefits for Data Base Codes, Linear Algebra Codes, Big Data, and Enterprise StorageThis article describes and contrasts advantages different types of memory, including Multi-Channel DRAM (MCDRAM) and High-Bandwidth Memory (HBM), the future 3D XPoint™ memory devices, and Intel® Omni-Path Fabric (Intel® OP Fabric).
Vector units in CPUs have become the de facto standard for acceleration of media, and other kernels that exhibit parallelism according to the single instruction, multiple data (SIMD) paradigm. SIMD on Intel® architecture processors have evolved to enable 512-bit register files in Intel® Advanced Vector Extensions 512 (Intel® AVX-512).
This article focuses on the steps to improve software performance with vectorization. Included are examples of full applications along with some simpler cases to illustrate the steps to vectorization.