By Erik Niemeyer (Intel Corporation) and Ken Strandberg (Catlow Communications*)
This is the first article in a series of articles about High Performance Computing with the Intel® Xeon Phi™ coprocessor.
Applying Intel® Threading Building Blocks Observers for Thread Affinity on Intel® Xeon Phi™ Coprocessors
In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library   provides high-level task based parallelism intended to hide sof
I was hoping to write a brief two part overview of how to configure the various power settings for the Intel® Xeon Phi™ coprocessor.
Yep. Here is another blog series from yours truly. Unfortunately, it will delay my long awaited – at least by me – discussion on measuring power.
Here is a rough outline for the blogs:
We had an ask from one of the various "Birds of a Feather" meetings Intel® holds at venues such as at the Super Computing* (SC) and International Super Computing* (ISC) conferences.
Power management policy has evolved over the years.
I don’t know if any of you have noticed but Intel® has a tendency to emphasize its own homegrown tools. This isn’t bad as Intel has some of the best.