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OpenMP* and the Intel® IPP Library

How to configure OpenMP in the Intel IPP library to maximize multi-threaded performance of the Intel IPP primitives.
Authored by Last updated on 07/31/2019 - 14:30
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The Importance of Vectorization for Intel Microarchitectures (Fortran Example)

Reference Link and Download

Intel Vectorization Tools

Authored by Martyn Corden (Intel) Last updated on 07/03/2019 - 20:00
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Programação Vetorial e Paralela com amplificador Intel® VTune™

Eduardo H. M. Cruz, Matheus S. Serpa, Arthur M. Krause, Philippe O. A. Navaux

Authored by Last updated on 12/12/2018 - 18:00
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Explicit Vector Programming in Fortran

No longer does Moore’s Law result in higher frequencies and improved scalar application performance; instead, higher transistor counts lead to increased parallelism, both through more cores and thr

Authored by Martyn Corden (Intel) Last updated on 03/27/2019 - 15:50
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Application Analysis for Intel® MIC Architecture Suitability

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
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Intel® Advisor on Cray* Systems

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Authored by Carlos R. (Intel) Last updated on 03/11/2019 - 09:00
Blog post

BKMs on the use of the SIMD directive

We had an ask from one of the various "Birds of a Feather" meetings Intel® holds at venues such as at the Super Computing* (SC) and International Super Computing* (ISC) conferences.

Authored by Last updated on 07/06/2019 - 17:00
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Measuring performance in HPC

This is the first article in a series of articles about High Performance Computing with the Intel® Xeon Phi™ coprocessor.

Authored by Last updated on 07/06/2019 - 16:10
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Putting Your Data and Code in Order: Data and layout - Part 2

Apply the concepts of parallelism and distributed memory computing to your code to improve software performance. This paper expands on concepts discussed in Part 1, to consider parallelism, both vectorization (single instruction multiple data SIMD) as well as shared memory parallelism (threading), and distributed memory computing.
Authored by David M. Last updated on 07/06/2019 - 16:40
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Tuning SIMD vectorization when targeting Intel® Xeon® Processor Scalable Family

Introduction

The Intel® Xeon® Processor Scalable Family is based on the server microarchitecture codenamed Skylake.

Authored by J.D. Patel (Intel) Last updated on 05/10/2019 - 08:30