Article

Performance Improvement Opportunities with NUMA Hardware

Intel’s non-uniform memory access (NUMA) strategy is based on several new memory technologies that promise significant improvements in both capability and performance. This article provides information on Multi-Channel DRAM (MCDRAM) and High-Bandwidth Memory (HBM), Non-volatile dual inline-memory modules (NVDIMMs), and Intel® Omni-Path Fabric (Intel® OP Fabric).
Authored by Last updated on 09/30/2019 - 17:30
Article

Parallelization Using Intel® MPI

Get an overview of parallelization using the Intel® MPI Library and links to additional documentation.
Authored by admin Last updated on 09/30/2019 - 17:30
Article

Programming and Compiling for Intel® Many Integrated Core Architecture

This article discussions parallelization and provides links that will help you understand your programming environment and evaluate the suitability of your app.
Authored by AmandaS (Intel) Last updated on 09/30/2019 - 17:28
Article

Modern Memory Subsystems Benefits for Data Base Codes, Linear Algebra Codes, Big Data, and Enterprise Storage

This article describes and contrasts advantages different types of memory, including Multi-Channel DRAM (MCDRAM) and High-Bandwidth Memory (HBM), the future 3D XPoint™ memory devices, and Intel® Omni-Path Fabric (Intel® OP Fabric).
Authored by Last updated on 09/30/2019 - 17:28
Article

Efficient Parallelization

This article is part of the Intel® Modern Code Developer Community documentation which supports developers in leveraging application performance in code through a systematic step-by-step optimization framework methodology. This article addresses: Thread level parallelization.
Authored by Ronald W Green (Blackbelt) Last updated on 09/30/2019 - 17:28
Article

Offload Computations from Servers with an Intel® Xeon Phi™ Processor

Learn how to use Offload over Fabric software for a server migration path.
Authored by Jan Z. (Intel) Last updated on 10/15/2019 - 15:30
Article

How to detect Knights Landing AVX-512 support (Intel® Xeon Phi™ processor)

The Intel® Xeon Phi™ processor, code named Knights Landing, is part of the second generation of Intel Xeon Phi products. Knights Landing supports Intel® AVX-512 instructions, specifically AVX-512F (foundation), AVX-512CD (conflict detection), AVX-512ER (exponential and reciprocal) and AVX-512PF (prefetch).
Authored by James R. (Blackbelt) Last updated on 10/15/2019 - 15:30
Article

Improve Performance with Vectorization

This article focuses on the steps to improve software performance with vectorization. Included are examples of full applications along with some simpler cases to illustrate the steps to vectorization.
Authored by David M. Last updated on 10/15/2019 - 15:30
Blog post

Advanced Computer Concepts for the (Not So) Common Chef: The Home Kitchen

Since that brief aside on terminology is out of the way, let us continue with the kitchen analogy.

Authored by Last updated on 10/15/2019 - 15:30
Article

如何检测 Knights Landing AVX-512 支持(英特尔至强融核处理器)

英特尔至强融核处理器(代号“Knights Landing”)是第二代英特尔至强融核产品的一部分。Knights Landing 支持 AVX-512 指令,特别是 AVX-512F (foundation)、AVX-512CD(冲突检测)、AVX-512ER(指数函数和倒数函数)和 AVX-512PF(预取)。

Authored by James R. (Blackbelt) Last updated on 10/15/2019 - 16:40