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Ultrabook Part 2: Intel® VTune™ Amplifier XE 2011 with Windows 8* and Visual Studio* 2012 RC

As I continue to explore different Ultrabook capabilities, in this blog I decided to look into a powerful threading and performance optimization tool for C/C++, .NET, and FORTRAN developers who nee

Authored by Jules Alfani (Intel) Last updated on 07/01/2015 - 16:00
Blog post

视频 - 借助英特尔至强融核协处理器实现并行编程和优化

下面是 Colfax International 发布的一组关于借助英特尔(R) 至强融核(TM) 协处理器实现并行编程和优化的视频。

Authored by tianhui s. Last updated on 05/19/2015 - 22:46
Blog post

视频 - 借助英特尔至强融核协处理器实现并行编程

Colfax International 最近发布了下列一组关于英特尔(R) 至强融核(TM) 协处理器的视频。

Authored by tianhui s. Last updated on 05/19/2015 - 22:38
Blog post

Videos - Parallel Programming and Optimization with Intel Xeon Phi Coprocessors

Here is a set of introductory videos from Colfax International on Parallel Programming and Optimization with Intel(R) Xeon Phi(TM) Coprocessors.

Authored by Mike Pearce (Intel) Last updated on 03/30/2015 - 13:29
Blog post

Videos - Parallel Programming with Intel Xeon Phi Coprocessors

Here is a list of recently published videos from Colfax International on Intel(R) Xeon Phi(TM) Coprocessors.

Authored by Mike Pearce (Intel) Last updated on 03/30/2015 - 12:17
Blog post

Intel(r) Transactional Synchronization Extensions (Intel(r) TSX) profiling with Linux perf

Intel TSX exposes a speculative execution mode to the programmer to improve locking performance.. Tuning speculation requires heavily on a PMU profiler.

Authored by Andreas Kleen (Intel) Last updated on 05/29/2014 - 09:25
Blog post

Debugging performance issues in Go programs

A comprehensive guide on performance debugging tools for the Go language.
Authored by Dmitry Vyukov Last updated on 05/10/2014 - 08:01
Blog post

Go Parallel 3

Parallel programming with the Go language (golang). The blog shows how and when to use sync and sync/atomic packages.
Authored by Dmitry Vyukov Last updated on 04/22/2014 - 11:23
Blog post

Go Parallel 2

Parallel programming with Go language (golang). The blog shows examples of parallel divide-and-conquer decomposition and parallel pipelines.
Authored by Dmitry Vyukov Last updated on 04/13/2014 - 04:29
Blog post

Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Authored by Roman Dementiev (Intel) Last updated on 01/29/2014 - 06:09
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