This blog contains additional content for the article "Advanced Vectorization" from Parallel Universe #12:
I'm excited by the announcement today o
The prior part (2) of this blog provided a header and set of function that
The prior part (3) of this blog showed the effects of the first-level implementation of the Hyper-Thread Phalanx.
For the next optimization, I knew what I wanted to do; I just didn’t know what to call it. In looking for words that describes loosely-synchronous, I came across plesiochronous:
We had an ask from one of the various "Birds of a Feather" meetings Intel® holds at venues such as at the Super Computing* (SC) and International Super Computing* (ISC) conferences.
Big Data requires processing huge amounts of data. Intel Advanced Vector Extensions 2 (aka AVX2) promoted most Intel AVX 128-bits integer SIMD instruction sets to 256-bits.