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The Chronicles of Phi - part 5 - Plesiochronous phasing barrier – tiled_HT3

For the next optimization, I knew what I wanted to do; I just didn’t know what to call it. In looking for words that describes loosely-synchronous, I came across plesiochronous:

Authored by jimdempseyatthecove Last updated on 07/11/2016 - 08:34
Blog post

Submissions open: High Performance Parallelism Gems

We have all had our little discoveries and triumphs in identifying new and innovative approaches that increased the performance of our applications. Occasionally we find something more, something that could also help others, an innovative gem. You now have an opportunity to broadcast your successes more widely to the benefit of our community. You are invited to submit a proposal to a...
Authored by Taylor K. (Intel) Last updated on 07/06/2016 - 21:08
Blog post

Intel® Parallel Computing Centers

I'm excited by the announcement today o

Authored by James R. Last updated on 06/06/2016 - 12:49
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Parallel Universe Magazine #12: Advanced Vectorization

This blog contains additional content for the article "Advanced Vectorization" from Parallel Universe #12:

Authored by Georg Z. (Intel) Last updated on 06/02/2016 - 14:46
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GT-Py: Accelerating NumPy Programs with Minimal Programming Effort

What is GT-Py?
Authored by Chi-keung Luk (Intel) Last updated on 05/24/2016 - 13:23
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Optimizing Big Data processing with Haswell 256-bit Integer SIMD instructions

Big Data requires processing huge amounts of data. Intel Advanced Vector Extensions 2 (aka AVX2) promoted most Intel AVX 128-bits integer SIMD instruction sets to 256-bits.

Authored by gaston-hillar Last updated on 05/21/2016 - 18:41
Blog post

The Chronicles of Phi - part 2 Hyper-Thread Phalanx – tiled_HT1

Strategy to address the performance issue through use of a Hyper-Thread Phalanx.
Authored by jimdempseyatthecove Last updated on 05/20/2016 - 16:58
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The Chronicles of Phi - part 3 Hyper-Thread Phalanx – tiled_HT1 continued

The prior part (2) of this blog provided a header and set of function that

Authored by jimdempseyatthecove Last updated on 05/20/2016 - 16:39
Blog post

The Chronicles of Phi - part 1 The Hyper-Thread Phalanx

The term phalanx is derived from a military formation used by the ancient Greeks and Romans. The formation generally involved soldiers lining up shoulder to shoulder, shield to shield multiple rows deep. The formation would advance in unison becoming “an irresistible force.” I use the term Hyper-Thread Phalanx to refer to the Hyper-Thread siblings of a core being aligned shoulder-to-shoulder and...
Authored by jimdempseyatthecove Last updated on 05/20/2016 - 16:39
Blog post

The Chronicles of Phi - part 4 - Hyper-Thread Phalanx – tiled_HT2

The prior part (3) of this blog showed the effects of the first-level implementation of the Hyper-Thread Phalanx.

Authored by jimdempseyatthecove Last updated on 05/20/2016 - 16:39
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