Article

OpenMP* and the Intel® IPP Library

How to configure OpenMP in the Intel IPP library to maximize multi-threaded performance of the Intel IPP primitives.
Authored by Last updated on 07/31/2019 - 14:30
Video

Part 4: Thread Parallelism and OpenMP*

We will talk about software threads, and particularly multithreading implementation with OpenMP* library.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
Article

Code Sample: Exploring MPI for Python* on Intel® Xeon Phi™ Processor

Learn how to write an MPI program in Python*, and take advantage of Intel® multicore architectures using OpenMP threads and Intel® AVX512 instructions.
Authored by Nguyen, Loc Q (Intel) Last updated on 07/06/2019 - 16:30
Article

Optimization Techniques for the Intel® MIC Architecture: Part 1 of 3

Part one of this three-part series focuses on thread parallelism and race conditions, and discusses using mutexes in OpenMP* to resolve race conditions.
Authored by Mike P. (Intel) Last updated on 03/21/2019 - 12:00
File Wrapper

Parallel Universe Magazine - Issue 16, November 2013

Authored by admin Last updated on 12/12/2018 - 18:08
Video

Part 7: Race Conditions and Mutexes

We will talk about race conditions, synchronization between OpenMP threads, using critical and atomic pragmas.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
File Wrapper

Parallel Universe Magazine - Issue 22, September 2015

Authored by admin Last updated on 12/12/2018 - 18:08
Video

Part 5: Parallel Loops, Private and Shared Variables, Scheduling

We will introduce private and shared variables, parallel loops, and their scheduling.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
Video

Part 8: Parallel Reduction

We will talk about parallel reduction in OpenMP* for-loops.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
Video

Part 1: SIMD Parallelism and Intrinsics

In the previous lectures, we already discussed the purpose and the architecture of Intel® Xeon Phi™ coprocessors.

Authored by admin Last updated on 03/21/2019 - 12:00