Article

Intel Composer XE 2013 Documentation Updates for Intel MIC Architecture

Late-breaking updates to the Intel(R) C++ and Fortran Composer XE 2013 documentation specific to the Intel(R) Many Integrated Core (Intel(R) MIC) architecture will be shown here.

Authored by Last updated on 03/21/2019 - 12:08
Article

Application Analysis for Intel® MIC Architecture Suitability

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
Article

Native and Offload Programming Models

Compiler Methodology for Intel® MIC Architecture

Authored by Ronald W Green (Blackbelt) Last updated on 03/21/2019 - 12:00
Article

Advanced Optimizations for Intel® MIC Architecture

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
Article

Advanced Optimizations for Intel® MIC Architecture, Low Precision Optimizations

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
Article

Programming for Multicore and Many-core Products including Intel® Xeon® processors and Intel® Xeon Phi™ X100 Product Family coprocessors

The programming models in use today, used for multicore processors every day, are available for many-core coprocessors as well. Therefore, explaining how to program both Intel Xeon processors and Intel Xeon Phi coprocessor is best done by explaining the options for parallel programming. This paper provides the foundation for understanding how multicore processors and many-core coprocessors are...
Authored by James R. (Blackbelt) Last updated on 06/14/2019 - 12:10
Article

Effective Use of the Intel® Compiler Offload Features for Intel® MIC Architecture

Compiler Methodology for Intel® Many Integrated Core (Intel® MIC) Architecture

Authored by Last updated on 03/21/2019 - 12:00
Article

Building a Native Application for Intel® Xeon Phi™ Coprocessors

Introduction
Authored by AmandaS (Intel) Last updated on 06/14/2019 - 11:50
Article

Element wise alignment requirements for data accesses to be ABI-compliant on the Intel® MIC Architecture

Unlike the IA-32 and Intel® 64 architectures, the Intel® MIC Architecture requires all data accesses to be properly aligned according to their size, otherwise the program may behave unpredictably.
Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
Article

Intel® Xeon Phi™ Coprocessor System Software Developers Guide

As with most computing systems, the Intel® Many Integrated Core Architecture programming model can be divided into two categories: application programming and system programming.

Authored by admin Last updated on 06/14/2019 - 11:50