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Seeing One TeraFlop/sec, the software side, and feeling a bit emotional

I've known this day was coming - but when I saw Knights Corner clearly sustaining a TeraFlop (DGEMM, wide range of block sizes) per second - I was surprised by my emotional reaction inside.

Authored by James R. (Blackbelt) Last updated on 03/21/2019 - 12:08
Blog post

How We Used Intel® MPI Library to Get Outstanding LINPACK Results on a Very Large System

Large clusters dominate the semi-annual list of the 500 fastest supercomputers in the world.

Authored by Last updated on 07/06/2019 - 17:00
Article

Intel® Software Tools give SAS* 9.2 a 2.68x performance boost on Intel® Xeon® processor 5500 series-based servers

Business analytics have become a fundamental asset for leading enterprises, turning mountains of data from diverse sources into actionable information that drives sound business decisions.
Authored by aaron-tersteeg (Intel) Last updated on 03/21/2019 - 12:40
Article

Improving Medical Imaging Performance on the Intel® Xeon® Processor 5500 series

In Medical Imaging, it is important to maximize healthcare quality by providing the best images in the shortest time to assure accurate diagnosis & patient treatment. This article describes the 50x speedup of an image reconstruction algorithm.
Authored by Last updated on 07/05/2019 - 11:43
Article

Tuning Guides and Performance Analysis Papers

Microarchitecture-specific guides to tuning and optimizing application performance with Intel® VTune™ Amplifier.
Authored by MrAnderson (Intel) Last updated on 05/10/2019 - 10:48
Article

Distributed Memory Coarray Programs with Process Pinning

This article describes a method to compile and run a distributed memory coarray program using Intel® Parallel Studio XE Cluster Edition for Linux . An example using Linux* is presented.
Authored by Kenneth Craft (Intel) Last updated on 07/08/2019 - 14:58
Article

Finding Non-trivial Opportunities for Parallelism in Existing Serial Code using OpenMP*

By Erik Niemeyer (Intel Corporation) and Ken Strandberg (Catlow Communications*)

Authored by Erik Niemeyer (Intel) Last updated on 07/06/2019 - 16:49
Article

Application Analysis for Intel® MIC Architecture Suitability

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
Article

Advanced Optimizations for Intel® MIC Architecture

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
Article

Advanced Optimizations for Intel® MIC Architecture, Low Precision Optimizations

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00