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Intel Software Conference 2013 - São Paulo e Rio de Janeiro

A Intel Software do Brasil realizou em Agosto o Intel Software Conference 2013

Authored by Luciano Palma (Intel) Last updated on 07/06/2019 - 16:30
Article

Caffe* Optimized for Intel® Architecture: Applying Modern Code Techniques

This paper demonstrates a special version of Caffe* — a deep learning framework originally developed by the Berkeley Vision and Learning Center (BVLC) — that is optimized for Intel® architecture.
Authored by Last updated on 07/06/2019 - 16:40
Blog post

Modernizing Software with Future-Proof Code Optimizations

by Henry A. Gabb, Sr. Principal Engineer, Intel Software and Services Group

Authored by Henry Gabb (Intel) Last updated on 07/06/2019 - 17:10
Article

Programação Vetorial e Paralela com amplificador Intel® VTune™

Eduardo H. M. Cruz, Matheus S. Serpa, Arthur M. Krause, Philippe O. A. Navaux

Authored by Last updated on 12/12/2018 - 18:00
Blog post

The Unfairness of Good Syntax

The unfairness of good syntax - bad syntax is a problem; good syntax is not a solution.
Authored by Last updated on 07/04/2019 - 11:17
Article

Explicit Vector Programming in Fortran

No longer does Moore’s Law result in higher frequencies and improved scalar application performance; instead, higher transistor counts lead to increased parallelism, both through more cores and thr

Authored by Martyn Corden (Intel) Last updated on 03/27/2019 - 15:50
Article

Optimizing Applications using Intel® Compiler for Intel® Xeon Processors

The key to performance measurement is two-fold, know exactly what you are measuring and collect your baseline data. Next, profile your application and identify a specific and realistic performance goal based on the profiling data. Follow these steps to optimize your software.
Authored by AmandaS (Intel) Last updated on 03/27/2019 - 14:12
Article

Application Analysis for Intel® MIC Architecture Suitability

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 03/21/2019 - 12:00
Article

Intel® Xeon Phi™ Processor code named “Knights Landing” - Application Readiness

As part of the application readiness efforts for future Intel® Xeon® processors and Intel® Xeon Phi™ processors (code named Knights Landing), developers are interested in improving two key aspects

Authored by Last updated on 07/06/2019 - 16:40
Article

Intel® Advisor on Cray* Systems

Introduction
Authored by Carlos R. (Intel) Last updated on 03/11/2019 - 09:00