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Parallelization Using OpenMP*

 

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 10/01/2019 - 12:34
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New Features for Intel® MIC Architecture in the Intel Compiler

The list below summarizes new features and changes specific to programming for Intel® MIC Architecture with Intel Compiler 15.0:

Authored by AmandaS (Intel) Last updated on 10/01/2019 - 12:34
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Choosing the right threading framework

This is the second article in a series of articles about High Performance Computing with the Intel Xeon Phi.

Authored by Last updated on 10/03/2019 - 09:30
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Parallelization Using Intel® Threading Building Blocks (Intel® TBB)

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 08/01/2019 - 09:30
Article

Application Analysis for Intel® MIC Architecture Suitability

Compiler Methodology for Intel® MIC Architecture

Authored by AmandaS (Intel) Last updated on 10/01/2019 - 12:34
Blog post

Applying Intel® Threading Building Blocks Observers for Thread Affinity on Intel® Xeon Phi™ Coprocessors

In spite of the fact that the Intel® Threading Building Blocks (Intel® TBB) library [1] [2] provides high-level task based parallelism intended to hide sof

Authored by Alex (Intel) Last updated on 08/01/2019 - 09:30
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Hybrid Parallelism: A MiniFE* Case Study

This case study examines the situation where the problem decomposition is the same for threading as it is for Message Passing Interface* (MPI); that is, the threading parallelism is elevated to the same level as MPI parallelism.
Authored by David M. Last updated on 07/06/2019 - 16:40
Article

Recipe: Building and Running MILC on Intel® Xeon® Processors and Intel® Xeon Phi™ Processors

MILC software represents a set of codes written by the MIMD Lattice Computation collaboration used to study quantum chromodynamics. This article provides instructions for code access, build and run directions for the “ks_imp_rhmc” application on Intel® Xeon® Gold and Intel® Xeon Phi™ processors for better performance on a single node.
Authored by Smahane Douyeb. (Intel) Last updated on 10/01/2019 - 14:58
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Optimizing Computer Applications for Latency: Part 2: Tuning Applications

For applications such as high frequency trading (HFT), search engines and telecommunications, it is essential that latency can be minimized.

Authored by Evgueny Khartchenko (Intel) Last updated on 07/06/2019 - 16:55
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Recognize and Measure Vectorization Performance

Get a background on vectorization and learn different techniques to evaluate its effectiveness.
Authored by David M. Last updated on 07/06/2019 - 16:40