Article

Introducing Intel® MPI Benchmarks

Intel® MPI Benchmarks
Authored by Gergana S. (Blackbelt) Last updated on 07/06/2019 - 16:40
Article

Distributed Memory Coarray Programs with Process Pinning

This article describes a method to compile and run a distributed memory coarray program using Intel® Parallel Studio XE Cluster Edition for Linux . An example using Linux* is presented.
Authored by Kenneth Craft (Intel) Last updated on 07/08/2019 - 14:58
Article

Hybrid applications: Intel MPI Library and OpenMP*

Tips and tricks on how to get the optimal performance settings for your mixed Intel MPI/OpenMP applications.
Authored by Gergana S. (Blackbelt) Last updated on 07/06/2019 - 19:20
Blog post

OpenMP* 4.0 may offer important solutions for targeting and vectorization

The upcoming OpenMP 4.0 will be discussed at SC12, and there wil

Authored by James R. (Blackbelt) Last updated on 05/28/2018 - 18:28
Article

Intel® Trace Collector Filtering

Filtering in the Intel® Trace Collector will apply specified filters to the trace collection process.  This directly reduces the amount of data collected.  The filter rules can be applied either vi

Authored by James T. (Intel) Last updated on 07/06/2019 - 19:14
Article

Enabling Connectionless DAPL UD in the Intel® MPI Library

What is DAPL UD?
Authored by Gergana S. (Blackbelt) Last updated on 07/07/2019 - 11:10
Article

Resource Guide for Intel® Xeon Phi™ Coprocessor Administrators

This article makes recommendations for how an administrator can get up to speed quickly on the Intel® Many Integrated Core (Intel® MIC) Architecture. This article is 1 of 3: For the Administrator, for the Developer, and for the Investigator. Someone who will administer and support a set of machines (individual/cluster) containing coprocessors. The assumption is that the following topics are of...
Authored by Last updated on 07/06/2019 - 16:30
Article

Parallel Direct Sparse Solver for Clusters

Product Overview

Authored by Alexander Kalinkin (Intel) Last updated on 07/06/2019 - 11:27
Blog post

BKMs on the use of the SIMD directive

We had an ask from one of the various "Birds of a Feather" meetings Intel® holds at venues such as at the Super Computing* (SC) and International Super Computing* (ISC) conferences.

Authored by Last updated on 07/06/2019 - 17:00
Article

Resource Guide for People Investigating the Intel® Xeon Phi™ Coprocessor

This article identifies resources for anyone investigating the value to their organization of the Intel® Xeon Phi™ coprocessor, which is based on the Intel® Many Integrated Core (Intel® MIC) archit

Authored by Last updated on 06/14/2019 - 12:10