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Part 4: Thread Parallelism and OpenMP*

We will talk about software threads, and particularly multithreading implementation with OpenMP* library.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
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Part 6: Fork-Join Model OpenMP* Tasks

Let's talk about Fork-Join parallelism.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
Article

Code Sample: Exploring MPI for Python* on Intel® Xeon Phi™ Processor

Learn how to write an MPI program in Python*, and take advantage of Intel® multicore architectures using OpenMP threads and Intel® AVX512 instructions.
Authored by Nguyen, Loc Q (Intel) Last updated on 07/06/2019 - 16:30
Article

Optimization Techniques for the Intel® MIC Architecture: Part 1 of 3

Part one of this three-part series focuses on thread parallelism and race conditions, and discusses using mutexes in OpenMP* to resolve race conditions.
Authored by Mike P. (Intel) Last updated on 03/21/2019 - 12:00
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Part 7: Race Conditions and Mutexes

We will talk about race conditions, synchronization between OpenMP threads, using critical and atomic pragmas.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
Video

Part 5: Parallel Loops, Private and Shared Variables, Scheduling

We will introduce private and shared variables, parallel loops, and their scheduling.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
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Part 8: Parallel Reduction

We will talk about parallel reduction in OpenMP* for-loops.

Videos Within This Chapter:

Authored by admin Last updated on 03/21/2019 - 12:00
Video

Part 3: Vector Dependence, Pointer Disambiguation, and SIMD-Enabled Functions

In this episode, we will talk about some of the problems you might get while using automatic vectorization feature of Intel® Professional Edition Compilers.

Authored by admin Last updated on 03/21/2019 - 12:00
Video

Part 9: Distributed-Memory Parallelism and MPI

In the previous episodes of this chapter, we learned how to use vectorization to parallelize calculations across vector lanes in each core.

Authored by admin Last updated on 03/21/2019 - 12:00
Video

Part 1: SIMD Parallelism and Intrinsics

In the previous lectures, we already discussed the purpose and the architecture of Intel® Xeon Phi™ coprocessors.

Authored by admin Last updated on 03/21/2019 - 12:00