Intel is bringing to market, in anticipation of general availability of the Intel® Xeon Phi™ Processor (codenamed Knights Landing), the Developer Access Program (DAP). DAP is an early access program for developers worldwide to purchase an Intel Xeon Phi Processor based system.
This tutorial shows how to install Offload over Fabric (OoF) software on 2nd generation Intel® Xeon Phi™ processor, configure the hardware, test the basic configuration, and enable OoF
Apply the concepts of parallelism and distributed memory computing to your code to improve software performance. This paper expands on concepts discussed in Part 1, to consider parallelism, both vectorization (single instruction multiple data SIMD) as well as shared memory parallelism (threading), and distributed memory computing.
Our building block is the FD compute kernels that are typically used for RTM (reverse time migration) algorithms for seismic imaging. The computations performed by the ISO-3DFD (Isotropic 3-dimensional finite difference) stencils play a major role in accurate imaging of complex subsurface structures in oil and gas surveys and exploration. Here we leverage the ISO-3DFD discussed in  and  and...
An Intro to Multi-Level Parallelism for High-Performance Computing by Clay Breshears | Life Sciences Software Architect, Intel
In this tutorial, we demonstrate some possible ways to optimize an application to run on the Intel® Xeon Phi™ processor
Intel held the Intel® Modern Code Developer Challenge that had about 2,000 students from 130 universities in 19 countries registered to participate in the Challenge. They were provided access to Intel® Xeon Phi™ coprocessors to optimize code used in a CERN openlab brain simulation research project. In this article Daniel Vea Falguera (Modern Code Developer Challenge winner) shares how he...