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Introducing Intel® MPI Benchmarks

Intel® MPI Benchmarks
Authored by Gergana S. (Blackbelt) Last updated on 07/06/2019 - 16:40
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Distributed Memory Coarray Programs with Process Pinning

This article describes a method to compile and run a distributed memory coarray program using Intel® Parallel Studio XE Cluster Edition for Linux . An example using Linux* is presented.
Authored by Kenneth Craft (Intel) Last updated on 07/08/2019 - 14:58
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Parallelization Using Intel® MPI

Get an overview of parallelization using the Intel® MPI Library and links to additional documentation.
Authored by admin Last updated on 03/21/2019 - 12:00
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Hybrid applications: Intel MPI Library and OpenMP*

Tips and tricks on how to get the optimal performance settings for your mixed Intel MPI/OpenMP applications.
Authored by Gergana S. (Blackbelt) Last updated on 07/06/2019 - 19:20
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How to run Intel® MPI on the Intel® Xeon Phi™ Coprocessor

Support for the Intel® Xeon Phi™ coprocessor (formerly code named Knights Corner) is being

Authored by Gergana S. (Blackbelt) Last updated on 07/06/2019 - 16:40
Article

MPI-specific Files for Intel® Xeon Phi™ Coprocessor: What is Needed?

If you're planning on running with the Intel® MPI Library in an environment that includes Intel® Xeon Phi™ coprocessor cards, you need to make sure all cards contain the appropriate libraries and s

Authored by Gergana S. (Blackbelt) Last updated on 07/06/2019 - 16:40
Article

Enabling Connectionless DAPL UD in the Intel® MPI Library

What is DAPL UD?
Authored by Gergana S. (Blackbelt) Last updated on 07/07/2019 - 11:10
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Resource Guide for Intel® Xeon Phi™ Coprocessor Developers

This article makes recommendations for how a developer can get up to speed quickly on the Intel® Many Integrated Core (Intel® MIC) Architecture. This is one of three articles: For the Administrator, for the Developer, and for the Investigator. Who is a Developer? Someone who will be programming on an Intel Many Integrated Core (Intel MIC) architecture. The assumption is that they are most...
Authored by Last updated on 07/06/2019 - 16:30
Article

Resource Guide for Intel® Xeon Phi™ Coprocessor Administrators

This article makes recommendations for how an administrator can get up to speed quickly on the Intel® Many Integrated Core (Intel® MIC) Architecture. This article is 1 of 3: For the Administrator, for the Developer, and for the Investigator. Someone who will administer and support a set of machines (individual/cluster) containing coprocessors. The assumption is that the following topics are of...
Authored by Last updated on 07/06/2019 - 16:30