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Option "-z defs" is no longer needed to detect missing symbols in code targeting Intel MIC Architecture at link time

Prior to Intel® Compiler 15.0 in the offload compilation model, the binaries targeting the Intel MIC Architecture were generated as dynamic libraries (.so).

Authored by Duan, Xiaoping (Intel) Last updated on 07/06/2019 - 16:40
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面向英特尔® 至强融核™ 处理器(代号“Knights Landing”)的开发人员访问计划

Intel is bringing to market, in anticipation of general availability of the Intel® Xeon Phi™ Processor (codenamed Knights Landing), the Developer Access Program (DAP). DAP is an early access program for developers worldwide to purchase an Intel Xeon Phi Processor based system.
Authored by Mike P. (Intel) Last updated on 03/21/2019 - 12:00
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Compiling for the Intel® Xeon Phi™ Processor and the Intel® Advanced Vector Extensions 512 ISA

This document briefly gives an overview of the Intel® Advanced Vector Extensions 512 (Intel® AVX-512) and shows different ways to build an application for the Intel® Xeon Phi™ processor x200 using the Intel® compiler.
Authored by Nguyen, Loc Q (Intel) Last updated on 06/14/2019 - 12:38
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Running Intel® Parallel Studio XE Analysis Tools on Clusters with Slurm* / srun

Since HPC applications target high performance, users are interested in analyzing the runtime performance of such applications.

Authored by Michael Steyer (Intel) Last updated on 07/06/2019 - 11:23
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Transform Enterprise, HPC & AI, Accelerate Parallel Code

Authored by admin Last updated on 07/06/2019 - 16:15
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Second Generation Intel® Xeon® Processor Scalable Family Technical Overview

New features and enhancements available in the second generation Intel® Xeon® processor Scalable family and how developers can take advantage of them
Authored by David Mulnix (Intel) Last updated on 04/05/2019 - 10:19
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第二代英特尔® 至强® 可扩展处理器产品家族技术概述

介绍第二代英特尔® 至强® 可扩展处理器产品家族的新特性、增强功能以及为开发人员带来的优势
Authored by David Mulnix (Intel) Last updated on 06/12/2019 - 02:08