Come learn what Intel specifically did to optimize LAMMPS to take advantage of Intel® Xeon® and Intel® Xeon® coprocessors, and about the resulting performance from those optimizations.
Developers of modern HPC applications face a challenge when scaling out their hybrid (MPI/OpenMP) applications.
HPC cluster programming model number 1 has been MPI for the past 10 or more years.
Parallelism delivers the capability High Performance Computing (HPC) requires.
The free ride of faster performance with increased clock speeds is long gone. Software must be both threaded and vectorized to fully utilize today’s and tomorrow’s hardware.
Processor graphics hardware occupies almost 30% of the processor silicon real estate.
A JTAG debugger can be a great tool in kernel module development.
A close look at software-based power analysis solutions on Intel® architecture-based systems.
Learn how to build and optimize imaging, in-vehicle infotainment (IVI), long-term evaluation reference design, and surveillance applications on Intel® architecture using different components of Intel®
As systems grow in complexity due to the number and type of cores, and vector size, you need to develop and update code to ensure scalability and take advantage of current and next-gen platforms.