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Intel Developer Tools for Ultrabook

Soon Ultrabooks will become widely available and will come with new features.  Developers will want to know what tools they can use to take advantage of the new capabilities.

Authored by Gael H. (Intel) Last updated on 06/14/2017 - 15:56
Article

Using Global Hot Keys in Intel® VTune™ Amplifier XE

Background

 

Authored by kevin-oleary (Intel) Last updated on 06/07/2017 - 10:04
Article

OpenMP* Loop Scheduling

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:26
Article

OpenMP Loop Collapse Directive

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/07/2017 - 11:58
Article

Guided Autoparallelism

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:26
Article

Fortran Array Data and Arguments and Vectorization

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:23
Article

Vectorization and Optimization Reports

Compiler Methodology for Intel® MIC Architecture

Authored by Ronald W Green (Intel) Last updated on 06/01/2017 - 11:24
Article

Data Alignment to Assist Vectorization

Compiler Methodology for Intel® MIC Architecture

Authored by Rakesh Krishnaiyer (Intel) Last updated on 06/01/2017 - 11:26
Article

Outer Loop Vectorization

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:25
Article

Outer Loop Vectorization via Intel Cilk Plus Array Notations

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:27
For more complete information about compiler optimizations, see our Optimization Notice.