The Intel® Xeon® processor E5-2600/4600 product family is based on Sandy Bridge EP microarchitecture which is an evolution of the Nehalem EP microarchitecture.
This webcast (from IDF 2014) covers technical details and best known methods (BKMs) for optimizing big data clusters and Hadoop* workloads on Intel® Xeon® processor E5 v3 based platforms.
Reliability, Availability and Serviceability Integration and Validation Guide for the Intel® Xeon® Processor E7- v3 Family - Memory Address Range Mirroring
The document provides the Memory Address Range Mirroring RAS feature’s software (BIOS/firmware, OS) and hardware integration and validation methodologies which
RAS Integration and Validation Guide for the Intel® Xeon® Processor E7- v3 Family - Error Reporting Through EMCA2
The document provides Enhanced Machine Check Architecture Gen 2 (EMCA2) RAS feature’s software (BIOS/Firmware, OS) and hardware integration guidance and validat
The Intel® Xeon® processor E7 v3 family now includes an instruction set called Intel® Advanced Vector Extensions 2 (Intel® AVX2), which can potentially improve application performance related to hi
1. Executive Summary2. Introduction