As part of the application readiness efforts for future Intel® Xeon® processors and Intel® Xeon Phi™ processors (code named Knights Landing), developers are interested in improving two key aspects
Intel’s next generation Xeon Phi™ processor family x200 product (code-named Knights Landing) brings in new memory technology, a high bandwidth on package memory called Multi-Channel DRAM (MCDRAM) in addition to the traditional DDR4. MCDRAM is a high bandwidth, low capacity memory, packaged with the Knights Landing Silicon.
How to efficiently use Multi-Channel DRAM (MCDRAM) and synchronous dynamic random-access memory.
Intel has brought to market the Intel® Xeon Phi™ Processor (codenamed Knights Landing), Developer Access Program (DAP). DAP is a program for developers worldwide to purchase an Intel Xeon Phi Processor based system.
The Intel® MPI Library and OpenMP* runtime libraries can create affinities between processes or threads, and hardware resources. This affinity keeps an MPI process or OpenMP thread from migrating to a different hardware resource, which can have a dramatic effect on the execution speed of a program.
The Weather Research and Forecasting (WRF) Model is a numerical weather prediction (NWP) system designed for both atmospheric research and operational forecasting needs. It is made up of about a half million lines of code, predominantly in Fortran*.
LAMMPS is an open-source software package that simulates classical molecular dynamics. As it supports many energy models and simulation options, its versatility has made it a popular choice. It was first developed at Sandia National Laboratories to use large-scale parallel computation.
While there are many different programming models for the Intel® Xeon Phi™ coprocessor (code-named Knights Corner (KNC)), this paper lists the more prevalent KNC programming models and further discusses some of the necessary changes to port and optimize KNC models for the Intel® Xeon Phi™ processor x200 self-boot platform.