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Exploring AVS Video Decoder Parallelism on Intel® Manycore Testing Lab

Using the Intel® Manycore Testing Lab researchers were able to scale investigations previously done on quad-core processors to 32 cores.

Authored by admin Last updated on 05/15/2017 - 13:34
Courseware

Using X on the Intel® Manycore Testing Lab

Using X services on the Intel(R) Manycore Testing Lab is unsupported, yet possible. This article demonstrates in general and in detail the four necessary steps to run X on the server:

Authored by admin Last updated on 05/15/2017 - 13:31
Courseware

Pointer Jumping for Exact Inference on Manycore Systems

We study the performance of a pointer jumping based exact inference algorithm for a special type of junction trees – a chain of cliques.

Authored by admin Last updated on 05/15/2017 - 13:31
Courseware

Matrix Multiplication, Performance, and Scalability in OpenMP: Student Challenge

This year, a simple matrix multiplication problem was posed to the students and we set up an internal contest, to obtain the fastest serial code.

Authored by admin Last updated on 05/15/2017 - 13:31
Courseware

Computation of Automorphism Groups of q-ary Codes

The purpose of this work is to develop and implement an effective algorithm to find automorphism groups of different algebraic and combinatorial objects in n-dimensional vector space over fin

Authored by admin Last updated on 05/15/2017 - 13:31
Courseware

Fast Spectral Estimation of Genetic Homology

Technical Brief- 32 Core Testing Plan Contest

Authored by admin Last updated on 05/15/2017 - 13:31
Article

Optimizing Legacy Molecular Dynamics Software with Directive-based Offload

Directive-based programming models are one solution for exploiting many-core coprocessors to increase simulation rates in molecular dynamics.

Authored by WILLIAM B. (Intel) Last updated on 01/30/2017 - 12:08
Courseware

Parallel fault simulation algorithm for multi-core systems with common memory

Fault simulation for sequential circuits numbers among the highly compute-intensive tasks in the integrated circuit design process.

Authored by admin Last updated on 12/08/2016 - 15:08
Courseware

Scalable parallel genetic algorithm for identifying sequences construction

The task of constructing of identifying sequences for synchronous sequential circuits is one of the central problems in the design process.

Authored by admin Last updated on 12/08/2016 - 15:08
Blog post

Submissions open: High Performance Parallelism Gems

We have all had our little discoveries and triumphs in identifying new and innovative approaches that increased the performance of our applications. Occasionally we find something more, something that could also help others, an innovative gem. You now have an opportunity to broadcast your successes more widely to the benefit of our community. You are invited to submit a proposal to a...
Authored by Taylor IoT Kidd Last updated on 09/28/2016 - 15:57
For more complete information about compiler optimizations, see our Optimization Notice.