Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop Memory Part 1: Basics

Explicit and implicit memory models; advanced usages of each memory model, including asynchronous offload and buffering; BKMs to enable best performance of the memory hierarchy on KNC

Authored by Gerald M. (Intel) Last updated on 02/02/2017 - 11:05
Video

How NUMA Affects your Workloads: Intel® VTune™ Amplifier

Many modern multi-socket systems are based on non-uniform memory access (NUMA), where access latency and bandwidth depend on the location of the physical memory relative to its use.

Authored by Bhanu Shankar (Intel) Last updated on 02/02/2017 - 11:05
Article

Warning #677: Memory usage conflict with precompiled header file seen on Windows* XP and Linux*

Memory allocation problems with precompiled headers can cause this warning.
Authored by Jennifer J. (Intel) Last updated on 01/26/2017 - 00:49
Article

Software Enabling for Memory Bandwidth Monitoring in the Intel® Xeon® Processor E5 v4 Family

This article describes software support available for the Memory Bandwidth Monitoring (MBM) feature. Prior blogs in this series have included an overview of the MBM feature and architecture and usage models, and detailed examples of proof points.
Authored by Nguyen, Khang T (Intel) Last updated on 12/15/2016 - 15:26
Article

Proof Points: Memory Bandwidth Monitoring in the Intel® Xeon® Processor E5 v4 Family

This article provides a number of Memory Bandwidth Monitoring (MBM) example proof points and discussion fitting with the usage models described in previous articles.
Authored by Nguyen, Khang T (Intel) Last updated on 12/15/2016 - 15:19
Blog post

Meshcentral.com - Boosting Server Performance

Authored by Ylian S. (Intel) Last updated on 08/15/2016 - 12:50
Blog post

Does anyone still remember Mnemosyne?

I finished my summer reading project on the way to the Intel Developer Forum 2011.
Authored by Clay B. Last updated on 08/15/2016 - 12:48
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