Video

How NUMA Affects your Workloads: Intel® VTune™ Amplifier

Many modern multi-socket systems are based on non-uniform memory access (NUMA), where access latency and bandwidth depend on the location of the physical memory relative to its use.

Authored by Bhanu Shankar (Intel) Last updated on 06/14/2017 - 08:55
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop Memory Part 1: Basics

Explicit and implicit memory models; advanced usages of each memory model, including asynchronous offload and buffering; BKMs to enable best performance of the memory hierarchy on KNC

Authored by Gerald M. (Intel) Last updated on 06/14/2017 - 08:51
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop Memory Part 2: Performance Tuning

Explicit and implicit memory models; advanced usages of each memory model, including asynchronous offload and buffering; BKMs to enable best performance of the memory hierarchy on KNC

Authored by Gerald M. (Intel) Last updated on 06/14/2017 - 08:44
Blog post

Avoiding Potential Problems - Memory Limits on the Intel(r) Xeon Phi(tm) Coprocessor

EXCEEDING MEMORY SPACE

Authored by Frances Roth (Intel) Last updated on 06/14/2017 - 15:52
Video

MPI-3 Is Here: Optimize and Perform with Intel® MPI Tools

https://software.intel.com/en-us/intel-mpi-library New functionality supporting the latest MPI-3.0 standard can benefit your HPC applications.

Authored by Gergana S. (Intel) Last updated on 06/14/2017 - 08:45
Article

Intel® Xeon® Processor E7 V3 Product Family New Reliability Features

1) Introduction
Authored by Nguyen, Khang T (Intel) Last updated on 06/07/2017 - 09:26
Article

Proof Points: Memory Bandwidth Monitoring in the Intel® Xeon® Processor E5 v4 Family

This article provides a number of Memory Bandwidth Monitoring (MBM) example proof points and discussion fitting with the usage models described in previous articles.
Authored by Nguyen, Khang T (Intel) Last updated on 06/01/2017 - 11:21
Article

Software Enabling for Memory Bandwidth Monitoring in the Intel® Xeon® Processor E5 v4 Family

This article describes software support available for the Memory Bandwidth Monitoring (MBM) feature. Prior blogs in this series have included an overview of the MBM feature and architecture and usage models, and detailed examples of proof points.
Authored by Nguyen, Khang T (Intel) Last updated on 06/01/2017 - 11:16
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