Blog post

Ultrabook Part 2: Intel® VTune™ Amplifier XE 2011 with Windows 8* and Visual Studio* 2012 RC

As I continue to explore different Ultrabook capabilities, in this blog I decided to look into a powerful threading and performance optimization tool for C/C++, .NET, and FORTRAN developers who nee

Authored by Jules Alfani (Intel) Last updated on 06/14/2017 - 16:35
Blog post

Is it time to replace the TOP 500 list?

A new TOP500 list was released at SC12. Is this one-dimensional benchmark still relevant in today's diverse HPC fields of computation?
Authored by Clay B. Last updated on 06/14/2017 - 16:01
Article

Intel EAPF Curriculum Lightning Round - SIGCSE 2013

 

Authored by Paul Steinberg (Intel) Last updated on 06/07/2017 - 10:45
Article

Porting applications to Intel® Xeon Phi™ Coprocessor

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Authored by Nguyen, Loc Q (Intel) Last updated on 06/07/2017 - 10:35
Video

Intel® Black Belt Software Developer Dr. Clay Breshears Discusses Genome Sequencing & Bioinformatics

Intel® Black Belt Software Developer Dr.

Authored by Gerald M. (Intel) Last updated on 06/14/2017 - 08:49
Video

Enhance Computing Taylor Series Expansion with Intel® Compiler and Intel® Threading Building Blocks

We optimized a version of a Taylor Series Expansion using the Intel® Compiler and Intel® Threading Building Blocks (Intel® TBB).

Authored by robert c. Last updated on 06/14/2017 - 08:45
Video

Get Guidance to Ease the Transition from Serial to Parallel Code Conversion using Intel® Advisor XE

We explore a key component of Intel® Parallel Studio XE 2015 suite called using Intel® Advisor XE.

Authored by Ravi V. (Intel) Last updated on 06/28/2017 - 16:31
Video

Enhance Computing Matrix Multiplication Using Intel® Compiler and Intel® Math Kernel Library (MKL)

We optimized a version of a triply nested loop matrix multiplication on Linux* using the Intel® Math Kernel Library (MKL).

Authored by robert c. Last updated on 06/14/2017 - 08:44
Video

Getting Better Performance on Dijkstra’s Shortest Path Graph Algorithm using the Intel® Compiler

We optimized a version of Dijkstra’s shortest path graph algorithm using a combination of Intel® Cilk™ Plus array notation and OpenMP* parallel for.

Authored by robert c. Last updated on 06/14/2017 - 08:45
Video

Intel® Evangelist Mike Pearce

Mike Pearce is the community manager for the Intel® Developer Zone's Code Modernization program.

Authored by Gerald M. (Intel) Last updated on 06/14/2017 - 08:54
For more complete information about compiler optimizations, see our Optimization Notice.