Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop: Performance Part 1: Porting Checklist

4-part series on Performance Tuning: Performance measurement techniques, tools, Hardware Perfmon-based bottleneck analysis

Authored by Jerry Makare (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop System Administration Part 3: Configuration

This video introduces the basic multi-user and other administrative features and techniques that the Advanced Intel® Xeon Phi™ Coprocessor supports.

Authored by Frances Roth (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop MPI Part 1: Overview

Covers: Intel(R) MPI Execution models on Intel(R) MIC Architecture, Pure MPI or hybrid MPI applications on MIC, Analysis of Intel(R) MPI codes with the Intel(R) Trace Analyzer and Collector (ITAC)

Authored by Loc N. (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop MPI Part 4: Hybrid Computing

Covers: Intel(R) MPI Execution models on Intel(R) MIC Architecture, Pure MPI or hybrid MPI applications on MIC, Analysis of Intel(R) MPI codes with the Intel(R) Trace Analyzer and Collector (ITAC)

Authored by Loc N. (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop MPI Part 7: Debugging

Covers: Intel(R) MPI Execution models on Intel(R) MIC Architecture, Pure MPI or hybrid MPI applications on MIC, Analysis of Intel(R) MPI codes with the Intel(R) Trace Analyzer and Collector (ITAC)

Authored by Jerry Makare (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop: Performance and Context

This video introduces the performance tuning and optimization theme of the Advanced Intel® Xeon Phi™ Coprocessor Workshop series.

Authored by Taylor K. (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop MKL Part 3: Native Application, Performance Roadmap, and User Support

MKL, usage models (automatic offload, compiler assisted offload, native execution), Performance on Knights Corner, limitations and known issues

Authored by Jerry Makare (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop Communications Part 3: Usage

Host to Coprocessor communication (IP addressing conventions, Proxy I/O, Runtime control)

Authored by Taylor K. (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop Vectorization Part 2: Arrays 1

Extracting Vector Performance with Intel Compilers

Authored by Taylor K. (Intel) Last updated on 07/26/2016 - 11:08
Video

Advanced Intel® Xeon Phi™ Coprocessor Workshop Vectorization Part 5: Loop

Extracting Vector Performance with Intel Compilers

Authored by Taylor K. (Intel) Last updated on 07/26/2016 - 11:08
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