Article

Replay of sessions talking about programming for Intel® Xeon Phi™ Coprocessors

This page contains replays of 5 sessions covering a variety of topics as listed below:

Authored by admin Last updated on 06/07/2017 - 10:36
Article

Creating parallel reactive and streaming applications with the Intel® Threading Building Blocks (Intel® TBB) flow graph

The flow graph feature available in Intel® Threading Building Blocks (Intel® TBB) allows users to easily create both dependence graphs and reactive, messaging passing graphs that execute on top of

Authored by admin Last updated on 06/07/2017 - 09:22
Article

Precision Memory Leak Detection Using the New On-Demand Leak Detection in Intel® Inspector XE

Intel® Inspector XE now gives you the ability to set and reset memory baselines and ask for memory leak information from your program whenever you want it.

Authored by admin Last updated on 06/07/2017 - 10:16
Blog post

Developers Gain App Exposure With Intel® Events

This past year, Intel® has hosted CodeFests, webinars, and hackathons for Android* developers in various locations around t

Authored by Wendy B. (Intel) Last updated on 06/14/2017 - 16:33
Event

From "Correct" to "Correct and Efficient": A Case Study with miniMD

Upon completion of this webinar, you will be familiar with how a given physical process be simulated on a computer efficiently.
Authored by admin Last updated on 09/01/2016 - 09:53
Event

Exploiting multi-level Parallelism in HPC applications

Upon completion of this webinar, you will be familiar with advanced threading methods for the Intel® Xeon Phi™ coprocessor such as various approaches to nested parallelism within the part.
Authored by admin Last updated on 09/01/2016 - 09:53
Event

Think Parallel Modern - Applications for Modern Hardware

Upon completion of this webinar you will become familiar with modern Intel parallel architectures and Intel® Xeon Phi™ architecture for both hardware and software.
Authored by admin Last updated on 09/01/2016 - 09:53
Event

Parallel Program Model on Intel® Xeon and Intel® Xeon Phi™ coprocessor

Upon completion of this webinar, you will be familiar with parallel programming models and their optimized use on clusters of Intel® Xeon and Intel® Xeon Phi™ coprocessor.
Authored by admin Last updated on 09/01/2016 - 09:53
For more complete information about compiler optimizations, see our Optimization Notice.