Case Study: Computing Black-Scholes with Intel® Advanced Vector Extensions

This case study discusses Intel® Advanced Vector Extensions (Intel® AVX) and gives an overview of the Black-Scholes valuation.
Authored by shuo-li (Intel) Last updated on 11/30/2016 - 19:41
Forum topic

AVX512 On Xeon Phi KNL using Intel Intrinsics


I am a newbie to AVX512 Intrinsics, I tried this simple test code on Intel Xeon Phi 7210. I compiled using xMIC_AVX512.

Authored by Mohammad A. Last updated on 11/30/2016 - 13:15
Forum topic

Supported processors for PTWRITE instruction?

I have an i7-6700k processor which does not support the PTWRITE instruction, even though it supports intel processor trace.

Authored by Muhammad Usman N. Last updated on 11/30/2016 - 12:47

Intel® IPP Functions Optimized for Intel® Advanced Vector Extensions 512 (Intel® AVX-512)

Below is the list of Intel® Integrated Performance Primitives (Intel® IPP) functions that are optimized for Intel® Advanced Vector Extensions 512 (Intel® AVX-512).

Authored by Shaojuan Z. (Intel) Last updated on 11/29/2016 - 17:53
Forum topic

AVX-512 in graph process applications

Hello, everyone!

Authored by ilya a. Last updated on 11/29/2016 - 12:28

Using Intel® IPP threaded static libraries

Q: How to get Intel® IPP Static threaded libraries?

Authored by Naveen Gv (Intel) Last updated on 11/28/2016 - 18:05
Forum topic

What is the status of VZEROUPPER use?

The problem with VZEROUPPER comes up again now that the recommendation for the Knights Landing processor is the opposite of previous processors.

Authored by Agner Last updated on 11/25/2016 - 12:22

Intel® Compiler Options for Intel® SSE and Intel® AVX generation (SSE2, SSE3, SSSE3, ATOM_SSSE3, SSE4.1, SSE4.2, ATOM_SSE4.2, AVX, AVX2, AVX-512) and processor-specific optimizations

Explains which Intel® Compiler switches to use to target and optimize for a specific platform, microarchitecture, CPU or processor.
Authored by Martyn Corden (Intel) Last updated on 11/22/2016 - 09:51
Forum topic

AVX2 optimized code execution time deviation

When running a benchmark which compares SSE optimized code with AVX2 optimized code I'm getting results for the AVX2 optimized code with a very strong  deviation:

Authored by L K. Last updated on 11/16/2016 - 09:47
Blog post

Celebrating a Decade of Parallel Programming with Intel® Threading Building Blocks (Intel®TBB)

This year marks the tenth anniversary of Intel® Threading Building Blocks (Intel® TBB).

Authored by Sharmila C. (Intel) Last updated on 11/15/2016 - 14:18
For more complete information about compiler optimizations, see our Optimization Notice.