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Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
Authored by Roman Dementiev (Intel) Last updated on 06/14/2017 - 16:17
Article

How AisaInfo ADB* Improves Performance with Intel® Xeon® Processor-Based Systems

This article describes how AsiaInfo ADB was able to take advantage of features like Intel® Advanced Vector Extensions 2 and Intel® Transactional Synchronization Extensions as well as faster Intel® Solid State Drive hard disks to improve its performance when running on systems equipped with the latest generation of Intel® Xeon® processors.
Authored by Nguyen, Khang T (Intel) Last updated on 06/01/2017 - 11:21
Blog post

Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Authored by Roman Dementiev (Intel) Last updated on 06/14/2017 - 15:53
Blog post

Intel® Transactional Synchronization Extensions (Intel® TSX) profiling with Linux perf

Intel® TSX exposes a speculative execution mode to the programmer to improve locking performance.. Tuning speculation requires heavily on a PMU profiler.

Authored by Andreas Kleen (Intel) Last updated on 06/14/2017 - 15:38
Blog post

Using HLE and RTM with older compilers with tsx-tools

To use HLE/RTM to improve lock scalability the lock library needs to be enabled.

Authored by Andreas Kleen (Intel) Last updated on 06/14/2017 - 13:26
Blog post

Web Resources about Intel® Transactional Synchronization Extensions

Short URL for this page: www.intel.com/software/tsx

Authored by Roman Dementiev (Intel) Last updated on 06/14/2017 - 16:43
Blog post

Monitoring Intel® Transactional Synchronization Extensions with Intel® PCM

After applying a new technology (a new processor, a hardware accelerator, a new instruction, etc) besides measuring the immediate performance delta one requires a method to verify that this technol

Authored by Roman Dementiev (Intel) Last updated on 06/14/2017 - 13:26
Blog post

TSX fallback paths

The need for fallback paths
Authored by Andreas Kleen (Intel) Last updated on 06/14/2017 - 13:26
Blog post

Fun with Intel® Transactional Synchronization Extensions

By now, many of you have heard of Intel® Transactional Synchronization Extensions (Intel® TSX).

Authored by Wooyoung Kim (Intel) Last updated on 06/14/2017 - 16:39
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