Blog post

Advanced Computer Concepts For The (Not So) Common Chef: Introduction

While talking to a very intelligent but non-engineer colleague, I found myself needing to explain the threading and other components of the current and next generation Intel® Xeon Phi™ archit

Authored by Last updated on 07/06/2019 - 17:10
Blog post

Advanced Computer Concepts For The (Not So) Common Chef: Terminology Pt 1

Before we start, I will use the next two blogs to clear up some terminology. If you are familiar with these concepts, I give you permission to jump to the next section.

Authored by Last updated on 07/06/2019 - 17:10
Blog post

Advanced Computer Concepts for The (Not So) Common Chef: First Some Terminology Part 2

OF COURSE, I KNOW WHAT A THREAD IS….DON’T I?

Now that we know what a core is, let’s dive into another source of confusion.

Authored by Last updated on 07/06/2019 - 17:10
Article

Accelerating Financial Applications on Intel® architecture

Learn more about an in-depth analysis of code modernization performance conducted by optimizing original CPU code and re-running tests on the latest GPU/CPU hardware.
Authored by George Raskulinec (Intel) Last updated on 07/06/2019 - 16:40
Blog post

Advanced Computer Concepts for the (Not So) Common Chef: The Home Kitchen

Since that brief aside on terminology is out of the way, let us continue with the kitchen analogy.

Authored by Last updated on 07/06/2019 - 17:10
Article

Parallel Programming Books

Use these parallel programming resources and books with your Intel® Xeon® processor and Intel® Xeon Phi™ processor family
Authored by Mike P. (Intel) Last updated on 03/21/2019 - 12:00
Article

GROMACS recipe for symmetric Intel® MPI using PME workloads

Objectives
Authored by Heinrich Bockhorst (Intel) Last updated on 07/06/2019 - 16:40
Blog post

Advanced Computer Concepts for the (Not So) Common Chef: Memory Hierarchy: Of Registers, Cache & Memory

After introducing this series of blogs, we established some

Authored by Last updated on 07/06/2019 - 17:10
Article

Case Study: Optimized Code for Neural Cell Simulations

One of the Intel® Modern Code Developer Challenge winners, Daniel Falguera, describes many of the optimizations he implemented and why some didn't work.
Authored by Last updated on 07/06/2019 - 16:40
Article

Palestra: Como otimizar seu código sem ser um "ninja" em Computação Paralela

Não perca a palestra "Como otimizar seu código sem ser um "ninja" em Computação Paralela" da Intel que será ministrada durante a Semana sobre Programação Massivamente Paralela em Petrópolis, RJ, no Laboratório Nacional de Computação Científica. Data: 02/02/2016 - 11h30 Local: LNCC - Av. Getúlio Vargas, 333 - Quitandinha - Petrópolis/RJ
Authored by Igor F. (Intel) Last updated on 07/06/2019 - 16:40