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OpenMP* Loop Scheduling

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:26
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OpenMP Loop Collapse Directive

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/07/2017 - 11:58
Blog post

Intel® Parallel Studio XE 2013 is here

Today Intel announced Intel® Parallel Studio XE 2013 (available immediately) and

Authored by James R. Last updated on 06/14/2017 - 16:04
Article

Guided Autoparallelism

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:26
Article

Fortran Array Data and Arguments and Vectorization

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:23
Article

Vectorization and Optimization Reports

Compiler Methodology for Intel® MIC Architecture

Authored by Ronald W Green (Intel) Last updated on 06/01/2017 - 11:24
Article

Data Alignment to Assist Vectorization

Compiler Methodology for Intel® MIC Architecture

Authored by Rakesh Krishnaiyer (Intel) Last updated on 06/01/2017 - 11:26
Forum topic

It's time to light the afterburners

I've been working with Nvidia compute boards for a while.

Authored by R Lloyd Rankin Last updated on 02/08/2014 - 16:20
Article

Outer Loop Vectorization

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:25
Article

Outer Loop Vectorization via Intel Cilk Plus Array Notations

Compiler Methodology for Intel® MIC Architecture

Authored by admin Last updated on 06/01/2017 - 11:27
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