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选择合适的同步基元以最大限度地减少开销

Currently, there are a number of synchronization mechanisms available, and it is left to the application developer to choose an appropriate one to minimize overall synchronization overhead.
Authored by admin Last updated on 09/30/2016 - 05:57
Article

如有可能可使用非阻塞锁

Non-blocking system calls allow the competing thread to return on an unsuccessful attempt to the lock, and allow useful work to be done, thereby avoiding wasteful utilization of execution resources at the same time.
Authored by admin Last updated on 09/30/2016 - 06:03
Article

使用线程化 API 提供的同步例程,而非手工编写同步例程

Application programmers sometimes write hand-coded synchronization routines rather than using constructs provided by a threading API in order to reduce synchronization overhead or provide different functionality than existing constructs offer.
Authored by admin Last updated on 09/30/2016 - 05:52
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Models Part 4

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Mike P. (Intel) Last updated on 09/30/2016 - 06:08
Video

Beginning Intel Xeon Phi Coprocessor Workshop: Programming Modeling Part 3

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Gerald M. (Intel) Last updated on 09/30/2016 - 06:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Models Part 2

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Mike P. (Intel) Last updated on 09/30/2016 - 06:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Performance Analysis

This module briefly discusses a performance analysis methodology, collecting HW performance data  and using Intel® VTune Applifier XE to view and interpret the performance data.

Authored by Mike P. (Intel) Last updated on 09/30/2016 - 06:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Modeling Part 1

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Mike P. (Intel) Last updated on 09/30/2016 - 06:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Optimization Part 2

This module looks at basic optimization techniques for the Intel Xeon Phi coprocessor.

Authored by Mike P. (Intel) Last updated on 09/30/2016 - 06:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Optimization Part 1

This module looks at basic optimization techniques for the Intel Xeon Phi coprocessor.

Authored by Mike P. (Intel) Last updated on 09/30/2016 - 06:08
For more complete information about compiler optimizations, see our Optimization Notice.