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Using Modern Code to Simulate Brain Development: Interview with Lukas Breitweiser, Intern at CERN openlab

Lukas Breitweiser discusses the importance of applying modern code and parallel computing to drive scientific exploration and discoveries in the context of his CERN openlab internship.  An internsh

Authored by admin Last updated on 05/30/2016 - 19:08
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采访英特尔® 现代代码开发人员挑战赛特等奖获得者 Mathieu Gravey

Mathieu Gravey 介绍了他的英特尔® 现代代码开发人员挑战赛参赛之旅,以及获得奖品 — CERN openlab 实习机会的喜悦。 在参赛过程中,他将现代代码和基于英特尔至强处理器的并行计算应用于优化大脑模拟代码,并将其性能提升了高达 32,000%。 对于此次实习,他希望与世界顶尖的研究科学家合作实现生物和信息系统的融合。

Authored by tianhui s. Last updated on 05/30/2016 - 19:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Models Part 4

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Taylor K. (Intel) Last updated on 05/30/2016 - 19:08
Video

Beginning Intel Xeon Phi Coprocessor Workshop: Programming Modeling Part 3

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Jerry Makare (Intel) Last updated on 05/30/2016 - 19:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Models Part 2

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Taylor K. (Intel) Last updated on 05/30/2016 - 19:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Performance Analysis

This module briefly discusses a performance analysis methodology, collecting HW performance data  and using Intel® VTune Applifier XE to view and interpret the performance data.

Authored by Taylor K. (Intel) Last updated on 05/30/2016 - 19:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Programming Modeling Part 1

This module looks at the rationale behind the approach taken by Intel with regards to the Intel® Xeon Phi coprocessor HW abstraction, programming model options, using standardized libraries such as

Authored by Taylor K. (Intel) Last updated on 05/30/2016 - 19:08
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Beginning Intel® Xeon Phi™ Coprocessor Workshop: Optimization Part 2

This module looks at basic optimization techniques for the Intel Xeon Phi coprocessor.

Authored by Taylor K. (Intel) Last updated on 05/30/2016 - 19:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Optimization Part 1

This module looks at basic optimization techniques for the Intel Xeon Phi coprocessor.

Authored by Taylor K. (Intel) Last updated on 05/30/2016 - 19:08
Video

Beginning Intel® Xeon Phi™ Coprocessor Workshop: Advanced Offload Topics Part 3

This module is a more in depth discussion of the offload programming model.

Authored by Taylor K. (Intel) Last updated on 05/30/2016 - 19:08
For more complete information about compiler optimizations, see our Optimization Notice.