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AES New Instructions

Digital Random Number Generator

Intel Instruction Set Architecture Extensions

AES-GCM Encryption Performance on Intel® Xeon® E5 v3 Processors
By John Mechalas (Intel)Posted 03/30/20150
This case study examines the architectural improvements made to the Intel® Xeon® E5 v3 processor family in order to improve the performance of the Galois/Counter Mode of AES block encryption. It looks at the impact of these improvements on the nginx* web server when backed by the OpenSSL* SSL/TLS...
Bringing SSL to Arduino* on Galileo Through wolfSSL*
By John Mechalas (Intel)Posted 03/27/20150
A PDF version of this article, as well as a zip archive of the code samples, are available in the downloads section, below. Contents IntroductionGetting StartedStep 1: Building wolfSSL for YoctoStep 2: Installing wolfSSL On GalileoStep 3: Modifying the Compile Patterns for the Arduino IDESt...
The Intel® Core™ M Processor
By Colleen Culbertson (Intel)Posted 09/29/20140
This article, aimed at developers, will provide a glimpse into this 64-bit, multi-core SOC processor, with an overview of the available Intel technologies, including Intel® HD Graphics 5300.
Intel® Device Protection Technology and McAfee Mobile Security for Android*
By EGOR F. (Intel)Posted 09/11/20140
Intel® Device Protection Technology Recent industry reports indicate Android* is the OS in more than 59 percent of laptops, tablets and smartphones worldwide. While its growth has been explosive and continues, vulnerabilities exist because Android is an open platform. Additionally, corporate IT ...
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Audit Log/Access Monitor in Intel AMT
By Lance Atencio (Intel) Posted on 04/20/15 2
Audit Log (also known as Access Monitor) is an feature introduced in AMT 4.0 that provides a place to record events and introduces a new type of user called Auditor. Key features of the Audit Log are: Auditor user type that cannot be removed or altered by the Administrator Policy based events ...
One less Password for me - Big savings for IT (No Password VPN with Intel® IPT with PKI)
By Colleen Culbertson (Intel) Posted on 06/20/14 0
Less passwords but still secure!  That would be a better world, wouldn't it? Working for a large security conscious corporation (Intel), I have been frustrated having to reenter my VPN password every time I got dropped by my home cable network or from a conference or hotel's overburdened network...
The Benefits of Solid-State Storage Technologies in the Cloud
By Thai Le (Intel) Posted on 12/16/13 0
Summary Solid-state drives (SSD) have rapidly evolved over the last few years, resulting in devices with more space and greater reliability. SSDs are used for caching in data centers and in larger system applications including computing massive data sets (big data: volume, variety, and velocity)...
Jeff's Notebook: Convenient and More Secure Login's - Intel Identity Protection Technology and MYDIGIPASS.COM
By Jeff Kataoka (Intel) Posted on 12/11/13 0
Login passwords, so important to protecting your various accounts or even your personal identity, but with all of our online accounts, what a pain passwords can be.  How do you remember all your user names and passwords?  Many people use the same user name and password for all of their online acc...
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Down to Business 8

Intel App Show for Developers 33: Live From IDF 2012

In this show Bob and Rhonda discuss the day two keynote from Renee James who runs the Software and Services Group. They discuss HTML5, transparent computing, cloud services and new software security features from McAfee.

Ultrabooks™: The Software Opportunity

What are Ultrabooks™ and how do they affect software? From sensors and touch to security – there are many exciting opportunities

Intel® Virtualization Technology (Intel® VT)

SDN, NFV, DPDK and the Open Networking Platform - FAQ
By Colleen Culbertson (Intel)Posted 04/09/20150
Frequently Asked Questions on SDN, NFV, DPDK and the Intel® Open Network Platform Server Why are SDN and NFV so important? Software Defined Networking (SDN) and Network Functions Virtualization (NFV) are emerging as an alternative to traditional network design because they address many of the d...
IDF'14 Software Networking Webinars
By Mike Pearce (Intel)Posted 01/19/20150
DATS002 - Virtualizing the Network to Enable a Software Defined Infrastructure Intel is heavily investing in products and technologies for network overlays, network function virtualization (NFV) and software defined networking (SDN) to help drive the network hardware architectural transformatio...
Open Source - OpenStack
By adminPosted 12/19/20140
OpenStack OpenStack is a massively scalable, open cloud computing platform designed for deploying and managing public, private, and hybrid cloud solutions through a single control plane. This open-source project has evolved quickly and many early adopters, including Intel, are using it to orch...
Intel® Hardware Accelerated Execution Manager
By adminPosted 10/24/201427
The Intel Hardware Accelerated Execution Manager (Intel® HAXM) is a hardware-assisted virtualization engine (hypervisor) that uses Intel Virtualization Technology (Intel® VT) to speed up Android app emulation on a host machine. In combination with Android x86 emulator images provided by Intel and...
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Are you ready to innovate - four new Virtualization technologies on the latest Intel® Xeon!
By Sunil Jain, (Intel) Posted on 09/08/14 0
Are you ready to innovate - four new Virtualization technologies on the latest Intel® Xeon! (By: Sunil Jain, Virtualization Marketing Manager, Intel Data Center Group) In case you didn’t catch the news - the latest Intel® Xeon® E5-2600 v3 Product Family (formerly codename #Haswell) has added fo...
Software Defined Storage with Intel® Enabling Technologies
By Thai Le (Intel) Posted on 06/27/14 0
Software-Defined Storage (SDS) is a software layer that manages storage infrastructure.  Software developers have the flexibility to use a variety of hardware, such as processors, network cards, and hard drives with their storage managing software to develop their own SDS solutions.  In this blog...
Intel® graphics virtualization update
By Sunil Jain, (Intel) Posted on 05/02/14 0
Traditional business models, built on graphics and visualization usages such as workstation remoting, VDI, DaaS, transcoding, media streaming, and on-line gaming, are beginning to draw open source attention, worldwide. Employees are becoming mobile. They want flexibility of working from any devic...
Now Available: Android SDK x86 System Image with Google APIs
By Josh Bancroft (Intel) Posted on 03/06/14 8
If you've used the Android SDK, you've probably noticed that Intel Atom x86 system images for the emulator have been available for a while now. You might have been frustrated with the fact that the system image didn't include access to any of the Google APIs. I have good news: Google has released...
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Correct LOCK CMPXCHG emulation when the destination operand is in separate pages
By Eugene K.0
How LOCK CMPXCHG instruction should be emulated if the destination operand crosses page boundary (and therefore can be in non-contiguous physical memory)? I see, KVM gives up emulation in this case:   static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt, unsigned long addr, const void *old, const void *new, unsigned int bytes, struct x86_exception *exception) { ... if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK)) goto emul_write; ... return X86EMUL_CONTINUE; emul_write: printk_once(KERN_WARNING "kvm: emulating exchange as write\n"); return emulator_write_emulated(ctxt, addr, new, bytes, exception); }   What is the approach for most correct emulation which is as close as possible to the native execution?  
How to enable virtualization in intel dual core processor E5400
By Jonathan A.1
How to enable virtualization in intel dual core processor E5400 Please help me in doing this Mother board is DG41RQ
vt-d posted interrupts support
By Rakesh B.1
Hello,         I have the S2600CP server board with cpu "Intel(R) Xeon(R) CPU E5-2620 v2 @ 2.10GHz" which supports for APICv, I had patched the linux kernel source 3.18.0 to support vt-d posted interrupts on direct assigned devices, Given in lkml "".         I had checked the vt-d specification document[1] that describes "Remapping hardware support for interrupt-posting capability is reported through the Posted Interrupt Support (PI) field in the Capability register (CAP_REG)", In which it returns as the posted interrupt is not supported.  The assigning the ixgbe network device is been done via VFIO assignment method.         [1]         Does the above hardware support vt-d posted interrupt for direct assigned device assignment or it requires any hardware to do this.   Thanks Rakesh
Intel VT-D and Intel X99 motherboards
By Ward H.1
Hi, I am thinking of buying a X99 motherboard that I can use for Vmware Workstation. The two brands that I am thinking of are ASUS and GigaByte. I have been looking into the Virtualization and plan on running VMWare Workstation 11.  So virtualize windows Server 2012, Windows 8.1 etc. Plus VMWare ESXi. So I think for the last one I need Vt-d. Now I have notice the the ASUS MB's have a few more options for VTD like: Vtd Azalea VCp optimizations. Interrupt Remapping Coherency Support (Non-ISoch) Coherency Support (ISoch) However the GigaByte board only allows me to turn VT-d on and off. So since I can't control these options would they be on by default on the GigaByte, is there anything 'Disadvantage' I have not being able to control them? (Or is all this a bit of a non-issue ?) BTW - I can understand people here might not know specifically about VMWare or the motherboards in question. For example I am wondering if say a board supports VT-d means that these options are inclu...
RSM and multiple cores
By MP1
Hi all, I am trying to understand a technology that makes use of SMM in relation to hypervisors (hypercheck), and I have a number of questions about SMM in general - I hope I am posting in the right forum. I'd be interested to understand the following: 1) I know that on SMI asserting, all cores (at different interruptible boundaries) will enter SMM: are there spurious cases where SMM is triggered on only less cores? 2) The RSM instruction is said to return the processor to the not-SMM state. Does it need to be executed on every processor in SMM mode? 3) If I am in SMM mode with all my cores (i.e. I wait until them all are in SMM with a mutex), if I execute RSM from one core, does it resume normal operations (i.e. the kernel code it was executing) while the others are left in SMM mode? I am asking because the Default Treatment of RSM (33.14.2) is not exactly clear to me in Intel's doc.   Thanks in advance.    
DCBX on XL710
By Chakravarthy N.1
Hi, I am trying to configure DCBX & ETS on Intel XL710 in Linux. Is it currently supported? dcbtool reports DCBX is not enabled and I could not find other any linux utility to configure ETS. Please let me know , if there is any config guide I can refer to to get it working. Thanks ~Chakri
Assign pages to VT-D devices
By steven7653
Need some help understanding the theory of operation for implementing Vt-D.  I've been through the manual a couple of times.  The part I'm having trouble understanding is when we assign the page tables to the root complex structures.  How does the guest know which frames it's allowed to assign for DMA use?  The only work around I could think of is to either A do a VMCALL and ask, or B mirror the entire range the guest is allowed to access vie EPT and assign that to the root complex structure as well.     
How to Teach my processor to support hardware virtualization?
By Aleksey C.2
  My processor (Intel Pentium dual-core T4200) does not support hardware virtualization. Can I solve the problem by any software? Thanks a lot for your advice.
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Reaching Technology From Blogs 7

Ylian has written a blog about Intel AMT Setup and Configuration using TLS-PSK and TLS-PKI.    Ylian stumbled across an interesting issue while updating the provisioning functionality of the OpenDTK tool.  What Ylian found was that for developers who are building their own Intel AMT Activation software, they will be required to use a non-standard TLS stack (the .NET TLS stack does not work.)  Watch RTFB 7 and learn more about what Intel AMT developers must know about writing software to enable Intel AMT systems with TLS.

Down to Business 8

Down to Business 7

Down to Business 6

Ylian Saint-Hilaire walks the audience through an introduction of  Learn how to install the agent, how to add a “Mesh” and then how to remotely control your remote devices.  

Reaching Technology From Blogs Show 1

In episode of RTFB (Reaching Technology From Blogs), Gael Hofemeier interviews Ylian Saint-Hilaire about two of his Meshcentral blogs: 

Intel® Virtualization Technology Pt. 1 of 3 - Virtualization Introduction

Intel® Virtualization Technology Pt. 1 of 3 - Virtualization Introduction [id:1127428458001]

Intel® Virtualization Technology Pt. 3 of 3 - Emerging Usage Models

Intel® Virtualization Technology Pt. 3 of 3 - Emerging Usage Models

Intel® Virtualization Technology Pt. 2 of 3 - Virtualization Usage Models

Intel® Virtualization Technology Pt. 2 of 3 - Virtualization Usage Models