Intel® Software Development Emulator

使用英特尔® 软件开发仿真器的优势

简介

全新的英特尔处理器引入了增强型扩展指令集,以此提升应用的性能或增强其安全性。  英特尔 AVX1 和 AVX21 等扩展指令集主要用于提升性能,而英特尔 SHA2 指令则用于 SHA 加速,从而增强应用的安全性。

如果开发人员希望用这些新指令创建应用,但目前的硬件不支持这些指令该怎么办?  公司如何证明购买新系统来支持新指令的价值,同时确保其应用能够充分利用这些新指令来提升性能?

英特尔® 软件开发仿真器可用于在不支持新指令的系统上执行包含这些指令的应用。

本文将探讨使用 SDE 测试使用新指令的代码所带来的优势。

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  • C/C++
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  • Intel® Software Development Emulator
  • Academic
  • Debugging
  • Development Tools
  • Intel® Core™ Processor
  • Open Source
  • Threading
  • Benefits of Using Intel® Software Development Emulator

    Introduction

    New Intel processors introduce enhanced instruction set extensions to improve performance or strengthen security of an application.  Instruction set extensions like Intel AVX1 and AVX21 are used to improve performance and Intel SHA2 instructions are used for SHA acceleration to increase security of an application.

  • Professors
  • Students
  • Linux*
  • Microsoft Windows* (XP, Vista, 7)
  • Microsoft Windows* 8.x
  • Server
  • Windows*
  • C/C++
  • Advanced
  • Beginner
  • Intermediate
  • Intel® Software Development Emulator
  • Academic
  • Debugging
  • Development Tools
  • Intel® Core™ Processor
  • Open Source
  • Threading
  • Calculating “FLOP” using Intel® Software Development Emulator (Intel® SDE)

    Purpose

    Floating point operations (FLOP) rate is used widely by the High Performance Computing (HPC) community as a metric for analysis and/or benchmarking purposes. Many HPC nominations (e.g., Gordon Bell) require the FLOP rate be specified for their application submissions.

    The methodology described here DOES NOT rely on the Performance Monitoring Unit (PMU) events/counters. This is an alternative software methodology to evaluate FLOP using the Intel® SDE.

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  • Intel® Software Development Emulator
  • FLOP
  • HPC
  • Floating point operations
  • Knights Landing
  • Intel® Many Integrated Core Architecture
  • 使用英特尔® 软件开发仿真器(英特尔® SDE)计算 “FLOP”

    目的

    作为分析指标和/或基于性能指标评测目的,浮点运算 (FLOP) 速度广泛运用于高性能计算 (HPC) 社区。 许多 HPC 贡献者(比如戈登·贝尔)要求提交应用时注明 FLOP 速度。

    本文所述的方法不依赖于性能监控单元 (PMU) 事件/计数器。 它是一种使用英特尔® SDE 评估 FLOP 的替代性软件方法。

  • Professors
  • Students
  • Linux*
  • Server
  • Advanced
  • Intermediate
  • Intel® Software Development Emulator
  • FLOP
  • HPC
  • Floating point operations
  • Knights Landing
  • Intel® Many Integrated Core Architecture
  • Analyzing Intel® SDE's TSX-related log data for capacity aborts

    Starting with version 7.12.0, Intel® SDE has Intel® TSX-related instruction and memory access logging features which can be useful for debugging Intel® TSX's capacity aborts. With the log data from the Intel SDE you can diagnose cache set population to determine if there is non-uniform cache set usage causing capacity overflows. A refined log data may be used to further diagnose the source of the aborts.

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  • Server
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  • Advanced
  • Intel® Software Development Emulator
  • Intel® Transactional Synchronization Extensions
  • Restricted Transactional Memory (RTM)
  • Debugging
  • Development Tools
  • Intel® Core™ Processor
  • Open Source
  • Optimization
  • Parallel Computing
  • Threading
  • License Agreement: 

    英特尔® 至强融核™ 协处理器(代号 “Knights Landing”)— 应用就绪

    为了将来在英特尔® 至强™ 处理器和英特尔® 至强融核™ 协处理器(代号 Knights Landing)上实现部分应用就绪,开发人员主要希望从两个方面改进工作负载:

    1. 矢量化/代码生成
    2. 线程并行性

    本文主要讨论矢量化/代码生成,并介绍了一些有用的线程并行工具和资源。

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  • Intel® C++ Compiler
  • Intel® Software Development Emulator
  • Intel® AVX-512
  • Knights Landing
  • Intel® IMCI
  • Intel® Many Integrated Core Architecture
  • Parallel Computing
  • Vectorization
  • Intel® Xeon Phi™ Processor code named “Knights Landing” - Application Readiness

    As part of the application readiness efforts for future Intel® Xeon® processors and Intel® Xeon Phi™ processors (code named Knights Landing), developers are interested in improving two key aspects of their workloads:

    1. Vectorization/code generation
    2. Thread parallelism

    This article mainly talks about vectorization/code generation and lists some helpful tools and resources for thread parallelism.

  • Server
  • Intermediate
  • Intel® C++ Compiler
  • Intel® Software Development Emulator
  • Intel® AVX-512
  • Knights Landing
  • Intel® IMCI
  • Intel® Many Integrated Core Architecture
  • Parallel Computing
  • Vectorization
  • Using Intel® SDE's chip-check feature

    Intel® SDE includes a software validation mechanism to restrict executed instructions to a particular microprocessor. This is intended to be a helpful diagnostic tool for use when deploying new software. Use chip check when you want to make sure that your program is not using instruction features that are not present on a specific microarchitecture implementation.

    In the output of "sde -long-help" there is a section describing the controls for this feature:

  • Apple OS X*
  • Linux*
  • Microsoft Windows* (XP, Vista, 7)
  • Microsoft Windows* 8.x
  • Intel® Software Development Emulator
  • Intel® Advanced Vector Extensions
  • Intel® Memory Protection Extensions
  • Intel® Streaming SIMD Extensions
  • Intel® Transactional Synchronization Extensions
  • Fun with Intel® Transactional Synchronization Extensions

    By now, many of you have heard of Intel® Transactional Synchronization Extensions (Intel® TSX). If you have not, I encourage you to check out this page (http://www.intel.com/software/tsx) before you read further. In a nutshell, Intel TSX provides transactional memory support in hardware, making the lives of developers who need to write synchronization codes for concurrent and parallel applications easier.

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