Intel® Advisor

Incidental Sharing

Sharing is incidental when tasks use the same memory location, but do not communicate any information using it.

The Basic Pattern

Suppose that a task always writes to a memory location before reading from it, and that the value that it writes is not read again outside the task. For example:

Adding Parallelism to Your Program

Once you have completed the previous steps in the Intel® Advisor workflow and have tested and approved a serial version of your application program, you can add parallelism to a selected parallel site. Before you add parallel framework code, you should complete developer/architect design and code reviews about the proposed parallel changes.

Parallelize Data - Intel Cilk Plus Loops with Complex Iteration Control

Sometimes the loop control is spread across complex control flow. Using Intel TBB or Intel Cilk Plus in this situation requires more features than the simple loops. Note that the task body must not access any of the auto variables defined within the annotation site, because they may have been destroyed before or while the task is running. Consider this serial code:

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