TSX

TSX anti patterns in lock elision code

Lock elision is a new way to scale programs. It requires following some rules for correctness and good performance. The basic rules are documented in the SDM, chapter 15, and the OPT-GUIDE, chapter 11.

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  • Profiling Intel® Transactional Synchronization Extensions with Intel® VTune™ Amplifier XE

    Intel® Transactional Synchronization Extensions (Intel® TSX) provides hardware transactional memory support. It exposes a speculative execution mode to the programmer to improve locking performance. There are many publications about Intel TSX and this article is not focused on explaining the concept. You can refer to the most comprehensive list of TSX-related technical resources in the Roman Dementiev blog.

  • Developers
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  • Intel Transactional Synchronization Extensions (Intel TSX)
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  • Coarse-grained locks and Transactional Synchronization explained

    Coarse-grained locks, and the importance of transactions, are key concepts that motivate why Intel Transactional Synchronization Extensions (TSX) is useful.  I’ll do my best to explain them in this blog.

    In my blog "Transactional Synchronization in Haswell," I describe new instructions (Intel TSX) that will improve the performance of coarse-grained locks.  Understanding coarse-grained locks and the concept of transactions are both key to understanding why Intel TSX matters.

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