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WRF Conus2.5km on Intel® Xeon Phi™ Coprocessors and Intel® Xeon® processors in Symmetric Mode

Overview

This document demonstrates the best methods to obtain, build and run the WRF model on multiple nodes in symmetric mode on Intel® Xeon Phi™ Coprocessors and Intel® Xeon processors. This document also describes the WRF software configuration and affinity settings to extract the best performance from multiple node symmetric mode operation when using Intel Xeon Phi Coprocessor and an Intel Xeon processor.

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  • Intel® Xeon Phi™ coprocessor Power Management Turbo Part 1: What is turbo? And how will it affect my horsepower?

    INTRODUCTION AND PURPOSE:

    This is the first of a series of blogs looking at Turbo: What it is and how it impacts software.

    This series discusses basic concepts, terminology, how Turbo relates to thermal profiles, when Turbo is useful, and whether Turbo can impact application design.

    This is a follow on to my previous series of blogs on power management.

    Intel® Xeon Phi™ coprocessor Power Management Part 3: An Intuitive Description of Power States Using Stick Figures and Light Bulbs

    AN INTUITIVE ILLUSTRATION OF A CORE AND ITS HW THREADS

    This is the fourth installment of a series of blogs on Power Management for the Intel® Xeon Phi™ coprocessor.

    Title: “Intel® Xeon Phi™ coprocessor Power Management Part 2b: Package C-States, The Details”

    After gating the clocks of every one of the cores, what other techniques can you use to get even more power savings. Here’s a trivial and admittedly flippant example of what you could do: unplug the processor. You’d be using no power, though the disadvantages of pulling the power plug are pretty obvious. A better idea is to selectively shutdown the more global components of the processor in such a way that you can bring the processor back up to a fully functional state (i.e. C0) relatively quickly. Package C-States are just that, the progressive shutdown of additional circuitry to get even more savings. Since we have already shutdown the entire package’s circuitry associated with the cores, the remaining circuitry is necessarily common to all the cores, thus the name “package” C-states.

    Choosing the right threading framework

    This is the second article in a series of articles about High Performance Computing with the Intel Xeon Phi. The Intel Xeon Phi is the first commercial product of Intel to incorporate the Many Integrated Core architecture. In this article I will present various frameworks for unleashing the power of multiple threads on the Xeon Phi. We will also have a look at interesting properties and advantages / disadvantages of each framework.

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  • Measuring performance in HPC

    This is the first article in a series of articles about High Performance Computing with the Intel Xeon Phi. The Intel Xeon Phi is the first commercial product of Intel to incorporate the Many Integrated Core architecture. In this article I will present the basics of the Xeon Phi architecture, the programming models and what we can do to measure the performance in cycles for micro benchmarks.

  • Developers
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  • Linux*
  • C/C++
  • Intermediate
  • Intel® C++ Compiler
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  • Intel® Cilk™ Plus
  • Intel® Composer XE
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  • OpenMP*
  • MIC
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  • performance
  • timing
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  • Intel® Many Integrated Core Architecture
  • Optimization
  • Parallel Computing
  • Threading
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