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the issue about APIC drop msix interrupt

hello, I have a difficult problem,.scenes are as follows:

the hardware env is Intel(R) Xeon(R) CPU E5-2609 v2 @ 2.50GHz, a Altera FPGA board. 

the os is Linux debian-rss 3.16.7-ckt7

FPGA create 32 DMA transfer to cpu, generate a interrupt per transfer.

This 32 interrput distribution to 8 diffirent msix IRQ.

According to APIC spec, each interrupt maybe one in ISR, one in IRR,the third maybe dropped.

But now i distribution 2 interrputs to each IRQ, why maybe dropped interrputs?

Use memory allocated in offload region on host

Hello,

This post covers two questions. I actually just need a (positive) answer for one of them, as that would be enough to solve my problem. But it would be nice to get an answer for both.

1. Is it possible to write to disk from the offload region?

2. How can I use memory allocated inside the offload region in the host?

Dynamic Shift

Hello,

I am trying to achieve a dynamic shift. Well, let me explain the task. I process data with SSE, AVX. Data gets loaded, worked with and later results are stored. To support arbitrary lengths, I need some kind of maskload, but also for SSE.

Suppose my lenght is 9 elements, I work with int32 and SSE. First load, second load is fine. Third load is fine from memory bound, this is no problem. But only element 0 in vector register is valid, others need to be zero. How do I achieve this best?

Multi-Threading, Multi-sockets and cache coherency

I got into a debate with someone on Stack Overflow and I want to make sure I've got my facts straight.

The question concerns cache coherency.  In a document below, it talks about maintaining cache coherency and mentions Intel as one of the manufacturers implementing cache coherency: 

http://acg.cis.upenn.edu/papers/cacm12_why_coherence_nearfinal.pdf

Windows External Network Bridge

Hello,

Is it possible to setup an external network bridge for the PHI on using a windows based operating system?

This information is not provided in the User's Guide.

I have simply highlighted the PHI and External network adapters and created a bridge.

What are the next steps for this to work?

Do i absolutely need to use Linux for this feature?

Thanks,

Rob

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