Optimization

Cómo desarrollar y evaluar aplicaciones Android* de 64 bits en plataformas x86 Intel®

Introducción

Cada vez hay más dispositivos móviles para el público en general que cuentan con arquitectura de 64 bits. Utilizar Android* de 64 bits es una excelente manera de acceder al mercado. En este artículo se presentará Android en arquitectura Intel® de 64 bits y se analizarán sus compatibilidades particulares, detalles técnicos, mejoras de rendimiento, problemas y soluciones disponibles para Android en plataformas basadas en procesadores Intel® Atom™.

  • Developers
  • Android*
  • Android*
  • HTML5
  • Java*
  • JavaScript*
  • Intermediate
  • Android
  • 32-bit
  • 64-bit
  • Android app development
  • Apps
  • performance
  • Development Tools
  • Optimization
  • C++ Operator Multi-Versioning

    This is my first posting here, so I apologize if this isn't quite the right place for this question.

    So I just got very interested in multiversioning in order to do some performance comparisons of instruction sets between Haswell and SandyBridge, and with functions it's a breeze, but when I tried to do the same with operators I received the following error:

    internal error: assertion failed: mangled_operator_name: bad kind (shared/cfe/edgcpfe/lower_name.c, line 10192)

    intrinsic for mulx

     

    Hello,

    I read the white paper "New Instructions Support Large Integer Arithmetic". I read that the umul128  intrinsic compiler will provide the instruction mulx to perform the full product of two integers.

    But I can't find any reference in the compiler C++ (2015.1.108) documentation.

    Is the intrinsic available for mulx using the intel c++ compiler ?

    Or how I can replace it with an asm instruction ? An example is welcome for the multiplication of two 64-bits integers.

     

    Mickaël

    Viable configuration for a home lab - 8 31S1P on 4 slot pcie 3.0 motherboard?

     Building my basement laboratory for math, machine learning, parallel programming, kagglng...

    Is it electrically possible to mount 2 cards per PCIE 3.0 x16 slot with daughter boards and extenders on a motherboard.

    At 300 watts per card tdp  it would likely take - 3 1000 watt power supplies BUT can we get enough power to the individual MIC's in this kind of configuration?

    Being able to spend on compute cards rather than infiniband switches/cards and platforms seems like a better way to spend the allowance my wife lets me keep if possible.

     

    Thanks,

    Intel MPSS on Ubuntu and Mellanox OFED 2.3

    Hi,

    We recently installed a PHI on a Dell R720 server running Ubuntu 14.04 with Mellanox OFED 2.3

    From https://software.intel.com/en-us/blogs/2014/09/23/working-with-mellanox-... at section 2.3, there is instructions to install Mellanox OFED 2.1 to support host IB adapter. I am running Mellanox OFED 2.3.1 and can't take it down to 2.1. The question is: Is it possible to work with Mellanox OFED 2.3.1 on the PHI?

    Media Server Studio TU7gacc mode for HEVC

    Hi

    In header file mfxstructures.h the enum is defined as 

    /* TargetUsages: from 1 to 7 inclusive */
    enum {
        MFX_TARGETUSAGE_1    =1,
        MFX_TARGETUSAGE_2    =2,
        MFX_TARGETUSAGE_3    =3,
        MFX_TARGETUSAGE_4    =4,
        MFX_TARGETUSAGE_5    =5,
        MFX_TARGETUSAGE_6    =6,
        MFX_TARGETUSAGE_7    =7,

    phi access

    Hi all,

    I am currently preparing an introductory course for HPC for some phd students at our university. We will work on some very simple example codes (openmp and mpi) and test them on small clusters we have here. Is there any possibility to have access to a phi so I could try to run some of this code on it to see how it behaves/scales? 

    Kind regards!

    streaming video thru Phi

    I am currently developing a real-time video processing application that runs on a dedicated 2-CPU Xeon linux box.  The application supports multiple video inputs and multiple video outputs with standard image processing like picture-in-a-picture, graphics and language-specific text overlay, etc. It is basically a pipeline-based architecture where a given input video stream is over laid with language-specific text overlays, then each language specific stream is output on a separate output.

    intel media sdk 2014 sample_decode_drm performance

    recently, I use intel media sdk 2014, test decode performance, 

    I use sample_decode_drm to test i3-3110M and i7-3615QE's performance 

    os:ubuntu12.04 kernal 3.2

    but, on the cpu i3-3110M sample_decode_drm can decode 18 way real-time decode

    on the cpu i7-3615QE it can only decode 15 way real-time decode

    what it's the matter?

    Subscribe to Optimization